Open Menu /

Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_dpll_mgr.c bxt_get_dpll() -> intel_reference_dpll()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->next 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->prev 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_interval 0-3758096380,u32max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 0 state->base.dev->mode_config.connection_mutex.head.next->prev 4096-ptr_max
PARAM_VALUE 1 crtc 4096-ptr_max
PARAM_VALUE 2 pll 4096-ptr_max
PARAM_VALUE 2 pll->info 4096-ptr_max
PARAM_VALUE 3 dpll_hw_state 4096-ptr_max
BUF_SIZE 2 pll (-1),1008
BUF_SIZE 2 pll (-1),1008
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 crtc $1
DATA_SOURCE 2 pll r intel_get_dpll_by_id
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 state->base.num_connector

drivers/gpu/drm/i915/display/intel_dpll_mgr.c dg2_get_dplls() -> intel_reference_dpll()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->next 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->prev 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_interval 0-3758096380,u32max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 0 state->base.dev->mode_config.connection_mutex.head.next->prev 4096-ptr_max
PARAM_VALUE 1 crtc 4096-ptr_max
PARAM_VALUE 2 pll 4096-ptr_max
PARAM_VALUE 2 pll->info 4096-ptr_max
PARAM_VALUE 3 dpll_hw_state 4096-ptr_max
BUF_SIZE 2 pll 0,1008
BUF_SIZE 2 pll 0,1008
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 crtc $1
DATA_SOURCE 2 pll r intel_find_dpll
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 state->base.num_connector

drivers/gpu/drm/i915/display/intel_dpll_mgr.c hsw_get_dpll() -> intel_reference_dpll()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->next 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->prev 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_interval 0-3758096380,u32max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 0 state->base.dev->mode_config.connection_mutex.head.next->prev 4096-ptr_max
PARAM_VALUE 1 crtc 4096-ptr_max
PARAM_VALUE 2 pll 4096-ptr_max
PARAM_VALUE 2 pll->info->id 0-8
PARAM_VALUE 3 dpll_hw_state 4096-ptr_max
BUF_SIZE 2 pll 0,1008
BUF_SIZE 2 pll 0,1008
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 crtc $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 state->base.num_connector

drivers/gpu/drm/i915/display/intel_dpll_mgr.c ibx_get_dpll() -> intel_reference_dpll()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->next 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->prev 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_interval 0-3758096380,u32max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 0 state->base.dev->mode_config.connection_mutex.head.next->prev 4096-ptr_max
PARAM_VALUE 1 crtc 4096-ptr_max
PARAM_VALUE 2 pll 4096-ptr_max
PARAM_VALUE 2 pll->info 4096-ptr_max
PARAM_VALUE 3 dpll_hw_state 4096-ptr_max
BUF_SIZE 2 pll (-1)-0,1008
BUF_SIZE 2 pll (-1)-0,1008
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 crtc $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 state->base.num_connector

drivers/gpu/drm/i915/display/intel_dpll_mgr.c icl_get_combo_phy_dpll() -> intel_reference_dpll()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->prev 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.acquired 2-u32max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_countdown 0-3758096380,u32max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_interval 0-3758096380,u32max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 1 crtc 4096-ptr_max
PARAM_VALUE 2 pll 4096-ptr_max
PARAM_VALUE 2 pll->info 4096-ptr_max
PARAM_VALUE 3 dpll_hw_state 4096-ptr_max
BUF_SIZE 2 pll 0,1008
BUF_SIZE 2 pll 0,1008
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 crtc $1
DATA_SOURCE 2 pll r intel_find_dpll
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll_mgr.c icl_get_tc_phy_dplls() -> intel_reference_dpll()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->prev 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.acquired 2-u32max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_countdown 0-3758096380,u32max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_interval 0-3758096380,u32max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 1 crtc 4096-ptr_max
PARAM_VALUE 2 pll 4096-ptr_max
PARAM_VALUE 2 pll->info 4096-ptr_max
PARAM_VALUE 3 dpll_hw_state 4096-ptr_max
BUF_SIZE 2 pll 0,1008
BUF_SIZE 2 pll 0,1008
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 crtc $1
DATA_SOURCE 2 pll r intel_find_dpll
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll_mgr.c icl_get_tc_phy_dplls() -> intel_reference_dpll()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->prev 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.acquired 2-u32max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_countdown 0-3758096380,u32max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_interval 0-3758096380,u32max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 1 crtc 4096-ptr_max
PARAM_VALUE 2 pll 4096-ptr_max
PARAM_VALUE 2 pll->info 4096-ptr_max
PARAM_VALUE 3 dpll_hw_state 4096-ptr_max
BUF_SIZE 2 pll 0,1008
BUF_SIZE 2 pll 0,1008
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 crtc $1
DATA_SOURCE 2 pll r intel_find_dpll
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll_mgr.c mtl_get_non_tc_phy_dpll() -> intel_reference_dpll()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->prev 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.acquired 2-u32max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_countdown 0-3758096380,u32max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_interval 0-3758096380,u32max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 1 crtc 4096-ptr_max
PARAM_VALUE 2 pll 4096-ptr_max
PARAM_VALUE 2 pll->info 4096-ptr_max
PARAM_VALUE 3 dpll_hw_state 4096-ptr_max
BUF_SIZE 2 pll 0,1008
BUF_SIZE 2 pll 0,1008
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 crtc $1
DATA_SOURCE 2 pll r intel_find_dpll
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll_mgr.c skl_get_dpll() -> intel_reference_dpll()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->next 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->prev 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->ww_ctx.deadlock_inject_interval 0-3758096380,u32max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 0 state->base.dev->mode_config.connection_mutex.head.next->prev 4096-ptr_max
PARAM_VALUE 1 crtc 4096-ptr_max
PARAM_VALUE 2 pll 4096-ptr_max
PARAM_VALUE 2 pll->info 4096-ptr_max
PARAM_VALUE 3 dpll_hw_state 4096-ptr_max
BUF_SIZE 2 pll 0,1008
BUF_SIZE 2 pll 0,1008
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 crtc $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 state->base.num_connector