Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0-u16max |
| BIT_INFO | 1 | sha_text | 0x0,0xff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0-u16max |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 2147483648 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0-255 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_validate_v_prime() -> intel_write_sha_text()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | sha_text | 120-5160 |
| CAPPED_DATA | 1 | sha_text | 1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |