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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c iproc_gpio_probe() -> iproc_pinconf_disable_map_create()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 0 chip->base 4096-ptr_max
PARAM_VALUE 0 chip->dev 4096-ptr_max
PARAM_VALUE 0 chip->dev->devres_head.prev 4096-ptr_max
PARAM_VALUE 0 chip->dev->devres_head.prev->next 4096-ptr_max
PARAM_VALUE 0 chip->dev->devres_head.prev->next->next 4096-ptr_max
PARAM_VALUE 0 chip->gc.gpiodev 0
PARAM_VALUE 0 chip->gc.irq.chip->flags 0
PARAM_VALUE 0 chip->gc.irq.chip->ipi_send_mask 0
PARAM_VALUE 0 chip->gc.irq.chip->ipi_send_single 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_bus_lock 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_bus_sync_unlock 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_calc_mask 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_compose_msi_msg 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_eoi 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_mask_ack 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_nmi_setup 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_nmi_teardown 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_pm_shutdown 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_pre_redirect 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_resume 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_retrigger 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_set_affinity 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_set_wake 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_shutdown 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_startup 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_suspend 0
PARAM_VALUE 0 chip->gc.irq.chip->irq_write_msi_msg 0
PARAM_VALUE 0 chip->gc.irq.chip->name 0
PARAM_VALUE 0 chip->gc.irq.domain 0
PARAM_VALUE 0 chip->gc.irq.initialized 0
PARAM_VALUE 0 chip->gc.irq.irq_disable 0
PARAM_VALUE 0 chip->gc.irq.irq_enable 0
PARAM_VALUE 0 chip->gc.irq.irq_mask 0
PARAM_VALUE 0 chip->gc.irq.valid_mask 0
PARAM_VALUE 0 chip->gc.ngpio 0
PARAM_VALUE 0 chip->gc.of_xlate 0
PARAM_VALUE 0 chip->gc.parent->devres_head.prev 0
PARAM_VALUE 0 chip->gc.parent->of_node 0
PARAM_VALUE 0 chip->gc.to_irq 0
PARAM_VALUE 0 chip->io_ctrl 0,4096-ptr_max
PARAM_VALUE 0 chip->io_ctrl_type 1-3
PARAM_VALUE 0 chip->lock.magic 3735899821
PARAM_VALUE 0 chip->lock.owner (-1)
PARAM_VALUE 0 chip->lock.owner_cpu u32max
PARAM_VALUE 0 chip->pctl 4096-ptr_max
PARAM_VALUE 0 chip->pctl->owner 0
PARAM_VALUE 0 chip->pctl->p->node.next 6512079319328243712
PARAM_VALUE 0 chip->pctl->p->users.refcount.refs.counter 1
PARAM_VALUE 0 chip->pctl->pin_desc_tree.xa_head 0,4098-s64max
PARAM_VALUE 0 chip->pctl->pin_function_tree.xa_flags 3264
PARAM_VALUE 0 chip->pctl->pin_function_tree.xa_head 0
PARAM_VALUE 0 chip->pctl->pin_group_tree.xa_flags 3264
PARAM_VALUE 0 chip->pctl->pin_group_tree.xa_head 0
PARAM_VALUE 0 chip->pctldesc.confops 8641294932173115392
PARAM_VALUE 0 chip->pctldesc.confops->is_generic 1
PARAM_VALUE 0 chip->pctldesc.confops->pin_config_get 2262169128677625856
PARAM_VALUE 0 chip->pctldesc.confops->pin_config_set 6915988976642445312
PARAM_VALUE 0 chip->pctldesc.name 1-u64max
PARAM_VALUE 0 chip->pctldesc.npins 0
PARAM_VALUE 0 chip->pctldesc.pctlops 3184152398935994368
PARAM_VALUE 0 chip->pctldesc.pctlops->dt_free_map 4720075795176730624
PARAM_VALUE 0 chip->pctldesc.pctlops->dt_node_to_map 467305595839533056
PARAM_VALUE 0 chip->pctldesc.pctlops->get_group_name 3079462843246297088
PARAM_VALUE 0 chip->pctldesc.pctlops->get_group_pins 0
PARAM_VALUE 0 chip->pctldesc.pctlops->get_groups_count 2356013411544924160
PARAM_VALUE 0 chip->pctldesc.pctlops->pin_dbg_show 0
PARAM_VALUE 0 chip->pctldesc.pins 1-u64max
PARAM_VALUE 0 chip->pctldesc.pmxops->set_mux 0
PARAM_VALUE 1 disable_mask 1
BUF_SIZE 0 chip 736
BUF_SIZE 0 chip->dev 1616
DATA_SOURCE 0 chip r devm_kzalloc
MEM_ZERO 0 chip
MEM_ZERO 0 chip->gc.add_pin_ranges
MEM_ZERO 0 chip->gc.dbg_show
MEM_ZERO 0 chip->gc.direction_input
MEM_ZERO 0 chip->gc.direction_output
MEM_ZERO 0 chip->gc.dis_hw_timestamp
MEM_ZERO 0 chip->gc.en_hw_timestamp
MEM_ZERO 0 chip->gc.free
MEM_ZERO 0 chip->gc.fwnode
MEM_ZERO 0 chip->gc.get
MEM_ZERO 0 chip->gc.get_direction
MEM_ZERO 0 chip->gc.get_multiple
MEM_ZERO 0 chip->gc.gpiodev
MEM_ZERO 0 chip->gc.init_valid_mask
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.activate
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.alloc
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.deactivate
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.debug_show
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.free
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.get_fwspec_info
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.map
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.match
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.select
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.translate
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.unmap
MEM_ZERO 0 chip->gc.irq.child_irq_domain_ops.xlate
MEM_ZERO 0 chip->gc.irq.child_offset_to_irq
MEM_ZERO 0 chip->gc.irq.child_to_parent_hwirq
MEM_ZERO 0 chip->gc.irq.chip
MEM_ZERO 0 chip->gc.irq.domain
MEM_ZERO 0 chip->gc.irq.fwnode
MEM_ZERO 0 chip->gc.irq.handler
MEM_ZERO 0 chip->gc.irq.init_hw
MEM_ZERO 0 chip->gc.irq.init_valid_mask
MEM_ZERO 0 chip->gc.irq.irq_disable
MEM_ZERO 0 chip->gc.irq.irq_enable
MEM_ZERO 0 chip->gc.irq.irq_mask
MEM_ZERO 0 chip->gc.irq.irq_unmask
MEM_ZERO 0 chip->gc.irq.lock_key
MEM_ZERO 0 chip->gc.irq.map
MEM_ZERO 0 chip->gc.irq.parent_domain
MEM_ZERO 0 chip->gc.irq.parent_handler
MEM_ZERO 0 chip->gc.irq.parents
MEM_ZERO 0 chip->gc.irq.populate_parent_alloc_arg
MEM_ZERO 0 chip->gc.irq.request_key
MEM_ZERO 0 chip->gc.irq.valid_mask
MEM_ZERO 0 chip->gc.label
MEM_ZERO 0 chip->gc.names
MEM_ZERO 0 chip->gc.of_node_instance_match
MEM_ZERO 0 chip->gc.of_xlate
MEM_ZERO 0 chip->gc.owner
MEM_ZERO 0 chip->gc.parent
MEM_ZERO 0 chip->gc.request
MEM_ZERO 0 chip->gc.set
MEM_ZERO 0 chip->gc.set_config
MEM_ZERO 0 chip->gc.set_multiple
MEM_ZERO 0 chip->gc.to_irq
MEM_ZERO 0 chip->pctldesc.custom_conf_items
MEM_ZERO 0 chip->pctldesc.custom_params
MEM_ZERO 0 chip->pctldesc.owner
MEM_ZERO 0 chip->pctldesc.pmxops
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 chip->pctl->desc->npins