Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/dma/lgm/lgm-dma.c ldma_chan_abc_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_abc_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 8
PARAM_VALUE 2 val 0,8
PARAM_VALUE 3 ofs 28
DATA_SOURCE 0 d r to_ldma_dev
FUZZY_MAX 2 val 8
BIT_INFO 2 val 0x0,0x8
HARD_MAX 2 val 8
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_byte_offset_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_byte_offset_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 2147483903
PARAM_VALUE 2 val 0,2147483648-2147483903
PARAM_VALUE 3 ofs 288
DATA_SOURCE 0 d r to_ldma_dev
FUZZY_MAX 2 val 0
BIT_INFO 2 val 0x0,0x800000ff
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_cctrl_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_data_endian_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_data_endian_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 131
PARAM_VALUE 2 val 0,128-131
PARAM_VALUE 3 ofs 512
DATA_SOURCE 0 d r to_ldma_dev
FUZZY_MAX 2 val 0
BIT_INFO 2 val 0x0,0x83
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_desc_endian_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_desc_endian_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 66304
PARAM_VALUE 2 val 0,65536,65792-66304
PARAM_VALUE 3 ofs 512
DATA_SOURCE 0 d r to_ldma_dev
FUZZY_MAX 2 val 0
BIT_INFO 2 val 0x0,0x103ff
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_desc_hw_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 flags
LOCK2 0 &d->dev_lock
HALF_LOCKED2 &c->vchan.lock
HALF_LOCKED2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_desc_hw_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 240
PARAM_VALUE 2 val 0,16-240
PARAM_VALUE 3 ofs 28
DATA_SOURCE 0 d r to_ldma_dev
BIT_INFO 2 val 0x0,0xf0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &d->dev_lock
HALF_LOCKED2 &c->vchan.lock
HALF_LOCKED2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_hdr_mode_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_hdr_mode_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 1073741824
PARAM_VALUE 2 val 1-16383,1073741824
PARAM_VALUE 3 ofs 272
DATA_SOURCE 0 d r to_ldma_dev
FUZZY_MAX 2 val 1073741824
BIT_INFO 2 val 0x0,0x40003fff
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_irq_init() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_irq_init() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 2 val 0
PARAM_VALUE 3 ofs 232,244
DATA_SOURCE 0 d r to_ldma_dev
FUZZY_MAX 3 ofs 244
BIT_INFO 3 ofs 0xe0,0xfc
HARD_MAX 3 ofs 244
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_off() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_off() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 1
PARAM_VALUE 2 val 0
PARAM_VALUE 3 ofs 28
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_on() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_on() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 1
PARAM_VALUE 2 val 1
PARAM_VALUE 3 ofs 28
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_reset() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_reset() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 2
PARAM_VALUE 2 val 2
PARAM_VALUE 3 ofs 28
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_rxwr_np_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_rxwr_np_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 2097152
PARAM_VALUE 2 val 0,2097152
PARAM_VALUE 3 ofs 28
DATA_SOURCE 0 d r to_ldma_dev
FUZZY_MAX 2 val 2097152
BIT_INFO 2 val 0x0,0x200000
HARD_MAX 2 val 2097152
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_set_class() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 63
PARAM_VALUE 3 ofs 24
DATA_SOURCE 0 d r to_ldma_dev
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_array_size
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_chan_set_class() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 1 mask 790016
PARAM_VALUE 2 val 0-1048575
PARAM_VALUE 3 ofs 28
DATA_SOURCE 0 d r to_ldma_dev
BIT_INFO 2 val 0x0,0xc0e00
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &d->dev_lock
LOCK2 flags
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_byte_enable_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 512
PARAM_VALUE 2 val 0,512
PARAM_VALUE 3 ofs 16
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
FUZZY_MAX 2 val 512
BIT_INFO 2 val 0x0,0x200
HARD_MAX 2 val 512
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
HOST_DATA 0 d->ver 0-9,11-u32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_chan_flow_ctl_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 64
PARAM_VALUE 2 val 0,64
PARAM_VALUE 3 ofs 16
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
FUZZY_MAX 2 val 64
BIT_INFO 2 val 0x0,0x40
HARD_MAX 2 val 64
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
HOST_DATA 0 d->ver 0-9,11-u32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_dburst_wr_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 8
PARAM_VALUE 2 val 0,8
PARAM_VALUE 3 ofs 16
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
FUZZY_MAX 2 val 8
BIT_INFO 2 val 0x0,0x8
HARD_MAX 2 val 8
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
HOST_DATA 0 d->ver 0-9,11-u32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_desc_fetch_on_demand_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 128
PARAM_VALUE 2 val 0,128
PARAM_VALUE 3 ofs 16
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
FUZZY_MAX 2 val 128
BIT_INFO 2 val 0x0,0x80
HARD_MAX 2 val 128
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
HOST_DATA 0 d->ver 0-9,11-u32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_df_tout_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 268369920
PARAM_VALUE 2 val 0,1073741824,1073807360-1342111744
PARAM_VALUE 3 ofs 16
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
FUZZY_MAX 2 val 0
BIT_INFO 2 val 0x0,0x4fffffff
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_drb_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 256
PARAM_VALUE 2 val 0,256
PARAM_VALUE 3 ofs 16
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
FUZZY_MAX 2 val 256
BIT_INFO 2 val 0x0,0x100
HARD_MAX 2 val 256
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
HOST_DATA 0 d->ver 0-9,11-u32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_global_polling_enable() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 2147549168
PARAM_VALUE 2 val 2147483648,2147483664-2147549168
PARAM_VALUE 3 ofs 20
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
BIT_INFO 2 val 0x80000000,0x8000fff0
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
HOST_DATA 0 d->ver 0-9,11-u32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_orrc_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 2147484144
PARAM_VALUE 2 val 0,2147483648,2147483664-2147484144
PARAM_VALUE 3 ofs 400
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
FUZZY_MAX 2 val 0
BIT_INFO 2 val 0x0,0x800001ff
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_pkt_arb_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 2147483648
PARAM_VALUE 2 val 2147483648
PARAM_VALUE 3 ofs 16
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
HOST_DATA 0 d->ver 0-9,11-u32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_reset() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 1
PARAM_VALUE 2 val 1
PARAM_VALUE 3 ofs 16
BUF_SIZE 0 d 632
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
HOST_DATA 0 d->ver 0-9,11-u32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_sram_desc_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 2
PARAM_VALUE 2 val 0,2
PARAM_VALUE 3 ofs 16
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
FUZZY_MAX 2 val 2
BIT_INFO 2 val 0x0,0x2
HARD_MAX 2 val 2
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
HOST_DATA 0 d->ver 0-9,11-u32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock

drivers/dma/lgm/lgm-dma.c ldma_dev_vld_fetch_ack_cfg() -> ldma_update_bits()

Type Parameter Key Value
PARAM_VALUE 0 d 4096-ptr_max
PARAM_VALUE 0 d->base 4096-ptr_max
PARAM_VALUE 1 mask 16
PARAM_VALUE 2 val 0,16
PARAM_VALUE 3 ofs 16
BUF_SIZE 0 d->chans 0-s32max
BUF_SIZE 0 d->core_clk (-1),1-s32max
BUF_SIZE 0 d->dev 1616
BUF_SIZE 0 d->ports 0-s32max
BUF_SIZE 0 d->rst (-1),8,280
CAPPED_DATA 0 d->chan_nrs 1
CAPPED_DATA 0 d->port_nrs 1
DATA_SOURCE 0 d $0
FUZZY_MAX 2 val 16
BIT_INFO 2 val 0x0,0x10
HARD_MAX 2 val 16
MEM_ZERO 0 d
MEM_ZERO 0 d->chans
MEM_ZERO 0 d->ports
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 d->chan_nrs 0-64[c]
HOST_DATA 0 d->channels_mask 0[c]
HOST_DATA 0 d->port_nrs 0-s32max[c]
HOST_DATA 0 d->ver 0-9,11-u32max[c]
NO_OVERFLOW_SIMPLE 0 d->chan_nrs
NO_OVERFLOW_SIMPLE 0 d->core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 d->port_nrs
LOCK2 flags
LOCK2 0 &d->dev_lock
TYPE_LOCK (struct ldma_dev)->dev_lock