Documented in 1 files:
Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/scsi/lpfc/lpfc_els.c lpfc_cmpl_fabric_iocb() -> (struct lpfc_iocbq)->cmd_cmpl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->fabric_iocb_count.counter | s32min-(-1),1-s32max |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_inode->i_rwsem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_inode->i_rwsem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->idiag_root->d_inode->i_rwsem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | phba->idiag_root->d_inode->i_rwsem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->nranges | s32min-s32max |
| PARAM_VALUE | 0 | phba->pcidev->dev.dma_io_tlb_mem->for_alloc | 0-1 |
| PARAM_VALUE | 0 | phba->pcidev->dev.msi.data->__iter_idx | 0-s64max |
| PARAM_VALUE | 0 | phba->pport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pport->phba->worker_thread->sched_class->set_cpus_allowed | 0,1927640468783054848,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->set_cpus_allowed | 0,509,42842092416756121,1927640468783054848,4090974917235912704,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->uclamp_enabled | 0-1 |
| PARAM_VALUE | 0 | *phba->RandomData | 0-4294967295 |
| PARAM_VALUE | 1 | cmdwqe | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->fabric_cmd_cmpl | 0 |
| PARAM_VALUE | 1 | cmdwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->list.prev->next | 1-u64max |
| PARAM_VALUE | 1 | cmdwqe->ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 1 | cmdwqe->ndlp->vport->phba->worker_thread->sched_class->set_cpus_allowed | 0,1927640468783054848,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 1 | cmdwqe->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 2 | rspwqe | 4096-ptr_max |
| BUF_SIZE | 0 | phba | (-1),64,128,280,1024 |
| BUF_SIZE | 0 | phba | (-1),64,128,280,1024 |
| DATA_SOURCE | 0 | phba | $0 |
| DATA_SOURCE | 1 | cmdwqe | $1 |
| DATA_SOURCE | 2 | rspwqe | $2 |
| CONTAINER | 1 | -496+0 | $(-1) |
| BIT_INFO | 1 | cmdwqe->cmd_flag | 0x0,0xffffffef |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | phba->pcb->hgpAddrHigh | 0[c] |
| HOST_DATA | 0 | phba->pcidev->current_state | 0-3[c] |
| HOST_DATA | 0 | phba->sli4_hba->asic_rev | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->conf_trunk | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->curr_disp_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->els_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->encryption_support | 0-1 |
| HOST_DATA | 0 | phba->sli4_hba->eq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->eq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->extents_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->fawwpn_flag | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->flash_id | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->fw_func_mode | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->intr_enable | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_start | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->mq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->mq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->next_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->next_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_possible_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_present_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_total | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->oas_next_lun | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba->physical_port | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->pport_name_sta | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_hdrs_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->rq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_rp | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_sr | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->vfi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->wq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->wq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba.asic_id.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bbscn_params.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.aphys | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.bmbx_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.pf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.vf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.duplex | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.fault | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.link_status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.logical_speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.number | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.topology | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.type | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_dv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_no | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_tp | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.optic_state | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.fcfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_cq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_eq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_fcfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_wq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.bv1s | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cmf | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_1 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_2 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_page_sz | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_type | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.loopbk_scope | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_cap | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_value | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_ver | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_bde_cnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_elem_cnt | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.nvme | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.oas_supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.pls | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.proto_types | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_db_window | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sge_supp_len | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_family | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_rev | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqpcnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqsize | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.sli4_flags.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.sli_intf.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.wwn_be | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.wwn_be | 0-u64max |
| NO_OVERFLOW_SIMPLE | 0 | phba->ModelDesc | |
| NO_OVERFLOW_SIMPLE | 0 | phba->ModelName | |
| NO_OVERFLOW_SIMPLE | 0 | phba->cfg_irq_chann | |
| NO_OVERFLOW_SIMPLE | 0 | phba->device_data_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_cmd_rsp_buf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_cmd_rsp_buf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_drb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hbq_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hbq_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hrb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_mbuf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_mbuf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_sg_dma_buf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_sg_dma_buf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->mbox_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->nlp_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pcidev->msix_base | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pport->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->rrq_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.num_possible_cpu | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_cqset | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_ctx_info | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_mrq_data | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_mrq_hdr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->vpi_bmask | |
| NO_OVERFLOW_SIMPLE | 0 | phba->worker_thread->dl.dl_runtime | |
| NO_OVERFLOW_SIMPLE | 0 | phba->worker_thread->dl.pi_se->dl_runtime | |
| HALF_LOCKED2 | 0 | &phba->epd_pool.lock | |
| HALF_LOCKED2 | 0 | &phba->sli4_hba.nvmels_wq->pring->ring_lock |
drivers/scsi/lpfc/lpfc_els.c lpfc_resume_fabric_iocbs() -> (struct lpfc_iocbq)->cmd_cmpl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_inode->i_rwsem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_inode->i_rwsem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->hbalock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | phba->idiag_root->d_inode->i_rwsem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | phba->idiag_root->d_inode->i_rwsem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->nranges | s32min-s32max |
| PARAM_VALUE | 0 | phba->pcidev->dev.dma_io_tlb_mem->for_alloc | 0-1 |
| PARAM_VALUE | 0 | phba->pcidev->dev.msi.data->__iter_idx | 0-s64max |
| PARAM_VALUE | 0 | phba->pport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pport->phba->worker_thread->sched_class->set_cpus_allowed | 0,1927640468783054848,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->set_cpus_allowed | 0,509,42842092416756121,1927640468783054848,4090974917235912704,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->uclamp_enabled | 0-1 |
| PARAM_VALUE | 0 | *phba->RandomData | 0-4294967295 |
| PARAM_VALUE | 1 | cmdwqe | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->fabric_cmd_cmpl | 0 |
| PARAM_VALUE | 1 | cmdwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->wcqe_cmpl.parameter | 259 |
| PARAM_VALUE | 2 | rspwqe | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->fabric_cmd_cmpl | 0 |
| PARAM_VALUE | 2 | rspwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->wcqe_cmpl.parameter | 259 |
| BUF_SIZE | 0 | phba | (-1),64,128,280,1024 |
| BUF_SIZE | 0 | phba | (-1),64,128,280,1024 |
| CAPPED_DATA | 0 | &phba->fabric_iocb_list | 1 |
| DATA_SOURCE | 0 | phba | $0 |
| CONTAINER | 1 | -496+0 | $(-1) |
| CONTAINER | 2 | -496+0 | $(-1) |
| BIT_INFO | 1 | cmdwqe->cmd_flag | 0x0,0xffffffef |
| BIT_INFO | 2 | rspwqe->cmd_flag | 0x0,0xffffffef |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | phba->pcb->hgpAddrHigh | 0[c] |
| HOST_DATA | 0 | phba->sli4_hba->asic_rev | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->conf_trunk | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->curr_disp_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->els_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->encryption_support | 0-1 |
| HOST_DATA | 0 | phba->sli4_hba->eq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->eq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->extents_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->fawwpn_flag | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->flash_id | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->fw_func_mode | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->intr_enable | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_start | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->mq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->mq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->next_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->next_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_possible_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_present_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_total | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->oas_next_lun | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba->physical_port | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->pport_name_sta | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_hdrs_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->rq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_rp | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_sr | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->vfi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->wq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->wq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba.asic_id.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bbscn_params.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.aphys | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.bmbx_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.pf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.vf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.duplex | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.fault | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.link_status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.logical_speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.number | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.topology | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.type | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_dv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_no | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_tp | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.optic_state | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.fcfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_cq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_eq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_fcfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_wq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.bv1s | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cmf | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_1 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_2 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_page_sz | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_type | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.loopbk_scope | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_cap | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_value | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_ver | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_bde_cnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_elem_cnt | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.nvme | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.oas_supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.pls | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.proto_types | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_db_window | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sge_supp_len | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_family | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_rev | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqpcnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqsize | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.sli4_flags.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.sli_intf.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.wwn_be | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.wwn_be | 0-u64max |
| NO_OVERFLOW_SIMPLE | 0 | phba->ModelDesc | |
| NO_OVERFLOW_SIMPLE | 0 | phba->ModelName | |
| NO_OVERFLOW_SIMPLE | 0 | phba->cfg_irq_chann | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_cmd_rsp_buf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_cmd_rsp_buf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_drb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hbq_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hbq_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hrb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_mbuf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_mbuf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_sg_dma_buf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_sg_dma_buf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pcidev->msix_base | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pport->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.num_possible_cpu | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_cqset | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_ctx_info | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_mrq_data | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_mrq_hdr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->vpi_bmask | |
| NO_OVERFLOW_SIMPLE | 0 | phba->worker_thread->dl.dl_runtime | |
| NO_OVERFLOW_SIMPLE | 0 | phba->worker_thread->dl.pi_se->dl_runtime | |
| HALF_LOCKED2 | 0 | &phba->epd_pool.lock | |
| HALF_LOCKED2 | 0 | &phba->sli4_hba.nvmels_wq->pring->ring_lock |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli4_fp_handle_fcp_wcqe() -> (struct lpfc_iocbq)->cmd_cmpl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->sli.last_iotag | 1-u16max |
| PARAM_VALUE | 1 | cmdwqe | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->cmd_cmpl | 1-u64max |
| PARAM_VALUE | 1 | cmdwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->cmd_cmpl | 1-u64max |
| PARAM_VALUE | 2 | rspwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->list.prev->next | 4096-ptr_max |
| DATA_SOURCE | 0 | phba | $0 |
| DATA_SOURCE | 1 | cmdwqe | r lpfc_sli_iocbq_lookup_by_tag |
| DATA_SOURCE | 2 | rspwqe | r lpfc_sli_iocbq_lookup_by_tag |
| CONTAINER | 1 | -496+0 | $(-1) |
| CONTAINER | 2 | -496+0 | $(-1) |
| NOCHECK_CALL |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli_cancel_iocbs() -> (struct lpfc_iocbq)->cmd_cmpl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_inode->i_rwsem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_inode->i_rwsem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->idiag_root->d_inode->i_rwsem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | phba->idiag_root->d_inode->i_rwsem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | phba->idiag_root->d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->idiag_root->d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->nranges | s32min-s32max |
| PARAM_VALUE | 0 | phba->pcidev->dev.dma_io_tlb_mem->for_alloc | 0-1 |
| PARAM_VALUE | 0 | phba->pcidev->dev.msi.data->__iter_idx | 0-s64max |
| PARAM_VALUE | 0 | phba->pport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pport->phba->worker_thread->sched_class->set_cpus_allowed | 0,1927640468783054848,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->set_cpus_allowed | 0,1927640468783054848,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | *phba->RandomData | 0-4294967295 |
| PARAM_VALUE | 1 | cmdwqe | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->cmd_cmpl | 1-u64max |
| PARAM_VALUE | 1 | cmdwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->cmd_cmpl | 1-u64max |
| PARAM_VALUE | 2 | rspwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->list.prev->next | 4096-ptr_max |
| BUF_SIZE | 0 | phba | (-1),64,128,280,1024 |
| BUF_SIZE | 0 | phba | (-1),64,128,280,1024 |
| DATA_SOURCE | 0 | phba | $0 |
| CONTAINER | 1 | -496+0 | $(-1) |
| CONTAINER | 2 | -496+0 | $(-1) |
| BIT_INFO | 1 | cmdwqe->cmd_flag | 0x0,0xffdfffff |
| BIT_INFO | 2 | rspwqe->cmd_flag | 0x0,0xffdfffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | phba->pcb->hgpAddrHigh | 0[c] |
| HOST_DATA | 0 | phba->pcidev->current_state | 0-3[c] |
| HOST_DATA | 0 | phba->sli4_hba->asic_rev | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->conf_trunk | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->curr_disp_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->els_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->encryption_support | 0-1 |
| HOST_DATA | 0 | phba->sli4_hba->eq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->eq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->extents_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->fawwpn_flag | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->flash_id | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->fw_func_mode | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->intr_enable | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_start | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->mq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->mq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->next_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->next_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_possible_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_present_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_total | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->oas_next_lun | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba->physical_port | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->pport_name_sta | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_hdrs_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->rq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_rp | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_sr | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->vfi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->wq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->wq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba.asic_id.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bbscn_params.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.aphys | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.bmbx_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.pf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.vf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.duplex | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.fault | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.link_status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.logical_speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.number | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.topology | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.type | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_dv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_no | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_tp | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.optic_state | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.fcfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_cq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_eq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_fcfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_wq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.bv1s | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cmf | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_1 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_2 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_page_sz | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_type | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.loopbk_scope | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_cap | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_value | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_ver | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_bde_cnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_elem_cnt | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.nvme | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.oas_supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.pls | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.proto_types | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_db_window | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sge_supp_len | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_family | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_rev | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqpcnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqsize | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.sli4_flags.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.sli_intf.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.wwn_be | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.wwn_be | 0-u64max |
| NO_OVERFLOW_SIMPLE | 0 | phba->cfg_irq_chann | |
| NO_OVERFLOW_SIMPLE | 0 | phba->device_data_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_drb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hbq_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hbq_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hrb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_mbuf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_mbuf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->mbox_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->nlp_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pport->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->rrq_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.num_possible_cpu | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->vpi_bmask | |
| NO_OVERFLOW_SIMPLE | 0 | phba->worker_thread->dl.pi_se->dl_runtime | |
| HALF_LOCKED2 | bh |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli_handle_fast_ring_event() -> (struct lpfc_iocbq)->cmd_cmpl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->hbalock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | phba->sli.last_iotag | 1-u16max |
| PARAM_VALUE | 1 | cmdwqe | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->cmd_cmpl | 1-u64max |
| PARAM_VALUE | 1 | cmdwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 2 | rspwqe | 3836643243897229312 |
| PARAM_VALUE | 2 | rspwqe->iocb.ulpCommand | 0-22,24-255 |
| PARAM_VALUE | 2 | rspwqe->list.next | 3836643243897229312 |
| PARAM_VALUE | 2 | rspwqe->list.prev | 3836643243897229312 |
| CAPPED_DATA | 0 | phba->iocb_rsp_size | 1 |
| DATA_SOURCE | 0 | phba | $0 |
| DATA_SOURCE | 1 | cmdwqe | r lpfc_sli_iocbq_lookup |
| CONTAINER | 1 | -496+0 | $(-1) |
| BIT_INFO | 1 | cmdwqe->cmd_flag | 0x0,0xfffffff7 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &sdev->request_queue->limits_lock | ||
| HALF_LOCKED2 | &shost->scan_mutex |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli_process_sol_iocb() -> (struct lpfc_iocbq)->cmd_cmpl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.iommu->pci_32bit_workaround | 0-1 |
| PARAM_VALUE | 0 | phba->hbalock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | phba->lpfc_drb_pool->size | 0-4294967295 |
| PARAM_VALUE | 0 | phba->lpfc_hbq_pool->size | 0-4294967295 |
| PARAM_VALUE | 0 | phba->lpfc_hrb_pool->size | 0-4294967295 |
| PARAM_VALUE | 0 | phba->sli.last_iotag | 1-u16max |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->set_cpus_allowed | 0,1927640468783054848,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | phba->wq->flags | 0-4294967295 |
| PARAM_VALUE | 0 | phba->wq->flush_color | s32min-s32max |
| PARAM_VALUE | 0 | phba->wq->work_color | s32min-s32max |
| PARAM_VALUE | 0 | *phba->RandomData | 0-4294967295 |
| PARAM_VALUE | 1 | cmdwqe | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->cmd_cmpl | 1-u64max |
| PARAM_VALUE | 1 | cmdwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe | 4096-ptr_max |
| DATA_SOURCE | 0 | phba | $0 |
| DATA_SOURCE | 1 | cmdwqe | r lpfc_sli_iocbq_lookup |
| DATA_SOURCE | 2 | rspwqe | $2 |
| CONTAINER | 1 | -496+0 | $(-1) |
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_drb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hrb_pool->allocation |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli_sp_handle_rspiocb() -> (struct lpfc_iocbq)->cmd_cmpl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->hbalock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->sli.last_iotag | 1-u16max |
| PARAM_VALUE | 0 | phba->wq->flags | 0-4294967295 |
| PARAM_VALUE | 0 | phba->wq->flush_color | s32min-s32max |
| PARAM_VALUE | 0 | phba->wq->work_color | s32min-s32max |
| PARAM_VALUE | 0 | *phba->RandomData | 0-4294967295 |
| PARAM_VALUE | 1 | cmdwqe | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->cmd_cmpl | 1-u64max |
| PARAM_VALUE | 1 | cmdwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe | 4096-ptr_max |
| BUF_SIZE | 0 | phba | 128 |
| BUF_SIZE | 0 | phba | 128 |
| DATA_SOURCE | 0 | phba | $0 |
| DATA_SOURCE | 1 | cmdwqe | r lpfc_sli_iocbq_lookup |
| CONTAINER | 1 | -496+0 | $(-1) |
| NOCHECK_CALL | |||
| HOST_DATA | 0 | phba->sli4_hba->asic_rev | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->conf_trunk | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->curr_disp_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->els_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->encryption_support | 0-1 |
| HOST_DATA | 0 | phba->sli4_hba->eq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->eq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->extents_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->fawwpn_flag | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->flash_id | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->fw_func_mode | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->intr_enable | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_start | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->mq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->mq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->next_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->next_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_possible_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_present_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_total | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->oas_next_lun | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba->physical_port | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->pport_name_sta | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_hdrs_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->rq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_rp | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_sr | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->vfi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->wq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->wq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba.asic_id.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bbscn_params.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.aphys | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.bmbx_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.pf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.vf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.duplex | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.fault | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.link_status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.logical_speed | 0 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.number | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.topology | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.type | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_dv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_no | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_tp | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.optic_state | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.fcfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_cq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_eq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_fcfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_wq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.bv1s | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cmf | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_1 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_2 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_page_sz | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_type | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.loopbk_scope | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_cap | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_value | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_ver | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_bde_cnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_elem_cnt | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.nvme | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.oas_supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.pls | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.proto_types | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_db_window | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sge_supp_len | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_family | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_rev | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqpcnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqsize | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.sli4_flags.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.sli_intf.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.wwn_be | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.wwn_be | 0-u64max |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli_wake_iocb_wait() -> (struct lpfc_iocbq)->cmd_cmpl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_inode->i_rwsem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_inode->i_rwsem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->hbalock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | phba->idiag_root->d_inode->i_rwsem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | phba->idiag_root->d_inode->i_rwsem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->nranges | s32min-s32max |
| PARAM_VALUE | 0 | phba->pcidev->dev.dma_io_tlb_mem->for_alloc | 0-1 |
| PARAM_VALUE | 0 | phba->pcidev->dev.msi.data->__iter_idx | 0-s64max |
| PARAM_VALUE | 0 | phba->pport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pport->phba->worker_thread->sched_class->set_cpus_allowed | 0,1927640468783054848,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->set_cpus_allowed | 0,509,42842092416756121,1927640468783054848,4090974917235912704,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->uclamp_enabled | 0-1 |
| PARAM_VALUE | 0 | *phba->RandomData | 0-4294967295 |
| PARAM_VALUE | 1 | cmdwqe | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->cmd_cmpl | 1-u64max |
| PARAM_VALUE | 1 | cmdwqe->cmd_flag | 2-u32max |
| PARAM_VALUE | 1 | cmdwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->list.prev->next | 1-u64max |
| PARAM_VALUE | 1 | cmdwqe->ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 1 | cmdwqe->ndlp->vport->phba->worker_thread->sched_class->set_cpus_allowed | 0,1927640468783054848,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 1 | cmdwqe->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 1 | cmdwqe->wait_cmd_cmpl | 0 |
| PARAM_VALUE | 2 | rspwqe | 0 |
| BUF_SIZE | 0 | phba | (-1),64,128,280,1024 |
| BUF_SIZE | 0 | phba | (-1),64,128,280,1024 |
| DATA_SOURCE | 0 | phba | $0 |
| DATA_SOURCE | 1 | cmdwqe | $1 |
| CONTAINER | 1 | -496+0 | $(-1) |
| BIT_INFO | 1 | cmdwqe->cmd_flag | 0x2,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | phba->pcb->hgpAddrHigh | 0[c] |
| HOST_DATA | 0 | phba->pcidev->current_state | 0-3[c] |
| HOST_DATA | 0 | phba->sli4_hba->asic_rev | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->conf_trunk | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->curr_disp_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->els_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->encryption_support | 0-1 |
| HOST_DATA | 0 | phba->sli4_hba->eq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->eq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->extents_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->fawwpn_flag | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->flash_id | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->fw_func_mode | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->intr_enable | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_start | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->mq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->mq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->next_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->next_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_possible_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_present_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_total | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->oas_next_lun | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba->physical_port | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->pport_name_sta | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_hdrs_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->rq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_rp | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_sr | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->vfi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->wq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->wq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba.asic_id.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bbscn_params.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.aphys | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.bmbx_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.pf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.vf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.duplex | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.fault | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.link_status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.logical_speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.number | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.topology | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.type | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_dv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_no | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_tp | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.optic_state | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.fcfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_cq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_eq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_fcfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_wq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.bv1s | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cmf | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_1 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_2 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_page_sz | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_type | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.loopbk_scope | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_cap | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_value | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_ver | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_bde_cnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_elem_cnt | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.nvme | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.oas_supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.pls | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.proto_types | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_db_window | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sge_supp_len | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_family | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_rev | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqpcnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqsize | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.sli4_flags.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.sli_intf.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.wwn_be | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.wwn_be | 0-u64max |
| NO_OVERFLOW_SIMPLE | 0 | phba->ModelDesc | |
| NO_OVERFLOW_SIMPLE | 0 | phba->ModelName | |
| NO_OVERFLOW_SIMPLE | 0 | phba->cfg_irq_chann | |
| NO_OVERFLOW_SIMPLE | 0 | phba->device_data_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_cmd_rsp_buf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_cmd_rsp_buf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_drb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hbq_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hbq_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hrb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_mbuf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_mbuf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_sg_dma_buf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_sg_dma_buf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->mbox_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->nlp_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pcidev->msix_base | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pport->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->rrq_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.num_possible_cpu | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_cqset | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_ctx_info | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_mrq_data | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_mrq_hdr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->vpi_bmask | |
| NO_OVERFLOW_SIMPLE | 0 | phba->worker_thread->dl.dl_runtime | |
| NO_OVERFLOW_SIMPLE | 0 | phba->worker_thread->dl.pi_se->dl_runtime | |
| HALF_LOCKED2 | 0 | &phba->epd_pool.lock | |
| HALF_LOCKED2 | 0 | &phba->sli4_hba.nvmels_wq->pring->ring_lock |
drivers/scsi/lpfc/lpfc_nvme.c lpfc_nvme_cancel_iocb() -> (struct lpfc_iocbq)->cmd_cmpl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_inode->i_rwsem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_inode->i_rwsem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_parent->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->hba_debugfs_root->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->idiag_root->d_inode->i_rwsem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | phba->idiag_root->d_inode->i_rwsem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_parent->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_automount | 0,2908707185815040000,3401111987815645184,6746145930460459008,7190988915944083456,7386785427940065280,8018779550845526016 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_init | 0,2385819921126617088,7057831443282669568,7824184004865302528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_iput | 0,170374395438985216,837750826476904448,5086081384299388928,8216155483032948736 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_manage | 0,1859587847549206528 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_prune | 0,2225594340392566784,7225953709177749504 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_real | 0,4509355519306412032 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_unalias_trylock | 0,6635409759016140800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_unalias_unlock | 0,6336447517789900800 |
| PARAM_VALUE | 0 | phba->idiag_root->d_sb->__s_d_op->d_weak_revalidate | 0,1549882712720502784,5632434648052031488,5669063523602272256,7231033168839651328 |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->nranges | s32min-s32max |
| PARAM_VALUE | 0 | phba->pcidev->dev.dma_io_tlb_mem->for_alloc | 0-1 |
| PARAM_VALUE | 0 | phba->pcidev->dev.msi.data->__iter_idx | 0-s64max |
| PARAM_VALUE | 0 | phba->pport | 0,4096-ptr_max |
| PARAM_VALUE | 0 | phba->pport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pport->phba->worker_thread->sched_class->set_cpus_allowed | 0,1927640468783054848,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->set_cpus_allowed | 0,509,42842092416756121,1927640468783054848,4090974917235912704,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->uclamp_enabled | 0-1 |
| PARAM_VALUE | 0 | *phba->RandomData | 0-4294967295 |
| PARAM_VALUE | 1 | cmdwqe | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->cmd_cmpl | 1-u64max |
| PARAM_VALUE | 1 | cmdwqe->cmd_flag | 2097152-u32max |
| PARAM_VALUE | 1 | cmdwqe->io_buf | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->io_buf->buf_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | cmdwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 1 | cmdwqe->wcqe_cmpl.parameter | 257,259 |
| PARAM_VALUE | 1 | cmdwqe->wcqe_cmpl.total_data_placed | 0 |
| PARAM_VALUE | 1 | cmdwqe->wcqe_cmpl.word0 | 768 |
| PARAM_VALUE | 1 | cmdwqe->wcqe_cmpl.word3 | 0,268435456 |
| PARAM_VALUE | 2 | rspwqe | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->cmd_cmpl | 1-u64max |
| PARAM_VALUE | 2 | rspwqe->cmd_flag | 2097152-u32max |
| PARAM_VALUE | 2 | rspwqe->io_buf | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->io_buf->buf_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 2 | rspwqe->list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 2 | rspwqe->wcqe_cmpl.parameter | 257,259 |
| PARAM_VALUE | 2 | rspwqe->wcqe_cmpl.total_data_placed | 0 |
| PARAM_VALUE | 2 | rspwqe->wcqe_cmpl.word0 | 768 |
| PARAM_VALUE | 2 | rspwqe->wcqe_cmpl.word3 | 0,268435456 |
| BUF_SIZE | 0 | phba | (-1),64,128,280,1024 |
| BUF_SIZE | 0 | phba | (-1),64,128,280,1024 |
| DATA_SOURCE | 0 | phba | $0 |
| DATA_SOURCE | 1 | cmdwqe | $1 |
| DATA_SOURCE | 2 | rspwqe | $1 |
| CONTAINER | 1 | -496+0 | $(-1) |
| CONTAINER | 2 | -496+0 | $(-1) |
| BIT_INFO | 1 | cmdwqe->cmd_flag | 0x200000,0xffffffff |
| BIT_INFO | 2 | rspwqe->cmd_flag | 0x200000,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | phba->pcb->hgpAddrHigh | 0[c] |
| HOST_DATA | 0 | phba->pcidev->current_state | 0-3[c] |
| HOST_DATA | 0 | phba->sli4_hba->asic_rev | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->conf_trunk | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->curr_disp_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->els_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->encryption_support | 0-1 |
| HOST_DATA | 0 | phba->sli4_hba->eq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->eq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->extents_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->fawwpn_flag | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->flash_id | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->fw_func_mode | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->intr_enable | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_start | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->mq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->mq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->next_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->next_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_possible_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_present_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_total | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->oas_next_lun | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba->physical_port | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->pport_name_sta | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_hdrs_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->rq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_rp | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_sr | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->vfi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->wq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->wq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba.asic_id.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bbscn_params.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.aphys | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.bmbx_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.pf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.vf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.duplex | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.fault | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.link_status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.logical_speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.number | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.topology | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.type | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_dv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_no | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_tp | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.optic_state | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.fcfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_cq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_eq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_fcfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_wq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.bv1s | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cmf | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_1 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_2 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_page_sz | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_type | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.loopbk_scope | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_cap | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_value | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_ver | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_bde_cnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_elem_cnt | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.nvme | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.oas_supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.pls | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.proto_types | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_db_window | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sge_supp_len | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_family | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_rev | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqpcnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqsize | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.sli4_flags.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.sli_intf.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.wwn_be | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.wwn_be | 0-u64max |
| NO_OVERFLOW_SIMPLE | 0 | phba->ModelDesc | |
| NO_OVERFLOW_SIMPLE | 0 | phba->ModelName | |
| NO_OVERFLOW_SIMPLE | 0 | phba->cfg_irq_chann | |
| NO_OVERFLOW_SIMPLE | 0 | phba->device_data_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_cmd_rsp_buf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_cmd_rsp_buf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_drb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hbq_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hbq_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_hrb_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_mbuf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_mbuf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_sg_dma_buf_pool->allocation | |
| NO_OVERFLOW_SIMPLE | 0 | phba->lpfc_sg_dma_buf_pool->dev->cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->mbox_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->nlp_mem_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pcidev->msix_base | |
| NO_OVERFLOW_SIMPLE | 0 | phba->pport->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->rrq_pool->min_nr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.dat_rq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.els_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.hdr_rq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.mbx_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.num_possible_cpu | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_cq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->page_size | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->phba->pcidev->dev.cma_area->available_count | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmels_wq->rqbp | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_cqset | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_ctx_info | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_mrq_data | |
| NO_OVERFLOW_SIMPLE | 0 | phba->sli4_hba.nvmet_mrq_hdr | |
| NO_OVERFLOW_SIMPLE | 0 | phba->vpi_bmask | |
| NO_OVERFLOW_SIMPLE | 0 | phba->worker_thread->dl.dl_runtime | |
| NO_OVERFLOW_SIMPLE | 0 | phba->worker_thread->dl.pi_se->dl_runtime | |
| HALF_LOCKED2 | bh | ||
| HALF_LOCKED2 | 0 | &phba->epd_pool.lock | |
| HALF_LOCKED2 | 0 | &phba->sli4_hba.nvmels_wq->pring->ring_lock |