Documented in 1 files:
Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli4_arm_cqeq_intr() -> (struct lpfc_sli4_hba)->sli4_write_eq_db()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->cfg_hdw_queue | 0-s32max |
| PARAM_VALUE | 0 | phba->cfg_irq_chann | 1-u32max |
| PARAM_VALUE | 0 | phba->sli4_hba.els_cq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | phba->sli4_hba.hba_eq_hdl | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->sli4_hba.hdwq | 1-u64max |
| PARAM_VALUE | 0 | phba->sli4_hba.mbx_cq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | phba->sli4_hba.nvmels_cq | 0,4096-ptr_max |
| PARAM_VALUE | 2 | count | 0 |
| PARAM_VALUE | 3 | arm | 1 |
| CAPPED_DATA | 0 | phba->cfg_hdw_queue | 1 |
| DATA_SOURCE | 0 | phba | $0 |
| NOCHECK_CALL |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli4_eqcq_flush() -> (struct lpfc_sli4_hba)->sli4_write_eq_db()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->link_state | s32min-3 |
| PARAM_VALUE | 0 | phba->pcidev | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->sli4_hba.hba_eq_hdl | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->sli4_hba.hdwq | 1-u64max |
| PARAM_VALUE | 1 | q | 4096-ptr_max |
| PARAM_VALUE | 3 | arm | 1 |
| DATA_SOURCE | 0 | phba | $0 |
| DATA_SOURCE | 1 | q | $1 |
| CONTAINER | 0 | -352-312+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | iflag | ||
| LOCK2 | 0 | &phba->hbalock | |
| HALF_LOCKED2 | &desc->request_mutex | ||
| HALF_LOCKED2 | _T->lock | ||
| HALF_LOCKED2 | flags | ||
| HALF_LOCKED2 | irq | ||
| TYPE_LOCK | (struct lpfc_hba)->hbalock |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli4_process_eq() -> (struct lpfc_sli4_hba)->sli4_write_eq_db()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | *phba->RandomData | 0-4294967295 |
| PARAM_VALUE | 1 | q | 4096-ptr_max |
| PARAM_VALUE | 1 | q->qe_valid | 0-1 |
| PARAM_VALUE | 2 | count | 1-s32max |
| PARAM_VALUE | 3 | arm | 0 |
| BUF_SIZE | 0 | phba | (-1),128 |
| BUF_SIZE | 0 | phba | (-1),128 |
| DATA_SOURCE | 0 | phba | $0 |
| DATA_SOURCE | 1 | q | $1 |
| CONTAINER | 0 | -352-312+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | phba->sli4_hba->asic_rev | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->conf_trunk | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->curr_disp_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->els_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->encryption_support | 0-1 |
| HOST_DATA | 0 | phba->sli4_hba->eq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->eq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->extents_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->fawwpn_flag | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->flash_id | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->fw_func_mode | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->intr_enable | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_start | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->mq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->mq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->next_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->next_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_possible_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_present_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_total | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->oas_next_lun | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba->physical_port | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->pport_name_sta | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_hdrs_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->rq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_rp | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_sr | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->vfi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->wq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->wq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba.asic_id.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bbscn_params.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.aphys | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.bmbx_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.pf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.vf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.duplex | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.fault | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.link_status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.logical_speed | 0 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.number | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.topology | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.type | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_dv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_no | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_tp | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.optic_state | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.fcfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_cq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_eq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_fcfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_wq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.bv1s | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cmf | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_1 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_2 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_page_sz | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_type | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.loopbk_scope | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_cap | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_value | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_ver | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_bde_cnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_elem_cnt | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.nvme | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.oas_supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.pls | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.proto_types | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_db_window | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sge_supp_len | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_family | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_rev | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqpcnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqsize | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.sli4_flags.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.sli_intf.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.wwn_be | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.wwn_be | 0-u64max |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli4_process_eq() -> (struct lpfc_sli4_hba)->sli4_write_eq_db()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | *phba->RandomData | 0-4294967295 |
| PARAM_VALUE | 1 | q | 4096-ptr_max |
| PARAM_VALUE | 2 | count | 0-s32max |
| BUF_SIZE | 0 | phba | (-1),128 |
| BUF_SIZE | 0 | phba | (-1),128 |
| DATA_SOURCE | 0 | phba | $0 |
| DATA_SOURCE | 1 | q | $1 |
| DATA_SOURCE | 3 | arm | $2 |
| CONTAINER | 0 | -352-312+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | phba->sli4_hba->asic_rev | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->conf_trunk | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->cq_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->curr_disp_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->els_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->encryption_support | 0-1 |
| HOST_DATA | 0 | phba->sli4_hba->eq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->eq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->extents_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->fawwpn_flag | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->flash_id | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba->fw_func_mode | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->intr_enable | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_max | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->io_xri_start | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->mq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->mq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->next_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->next_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_possible_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->num_present_cpu | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_io_wait_total | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->nvmet_xri_cnt | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->oas_next_lun | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba->physical_port | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->pport_name_sta | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rpi_hdrs_in_use | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->rq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->rq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_mask_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_rp | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->ue_to_sr | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba->vfi_count | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba->wq_ecount | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba->wq_esize | s32min-s32max |
| HOST_DATA | 0 | phba->sli4_hba.asic_id.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bbscn_params.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.aphys | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.bmbx_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_hi | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.bmbx.dma_address.addr_lo | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.pf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.iov.vf_number | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.duplex | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.fault | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.link_status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.logical_speed | 0 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.number | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.speed | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.status | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.link_state.topology | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.link_state.type | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_dv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_no | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.lnk_tp | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.lnk_info.optic_state | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.fcfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_cq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_eq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_fcfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_rq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vfi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_vpi | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_wq | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.max_xri | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.rpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vfi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.vpi_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_base | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.max_cfg_param.xri_used | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.bv1s | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cmf | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.cqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqav | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.eqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_1 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.featurelevel_2 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.hdr_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_page_sz | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.if_type | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.loopbk_scope | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_cap | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_value | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mi_ver | 0-u16max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_bde_cnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mib_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_elem_cnt | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.mqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.nvme | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.oas_supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.pls | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.proto_types | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_db_window | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.rqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sge_supp_len | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sgl_pp_align | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_family | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.sli_rev | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.supported | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wq_pages_max | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqe_size | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqpcnt | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqsize | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.pc_sli4_params.wqv | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.sli4_flags.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.sli_intf.word0 | 0-u32max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwnn.u.wwn_be | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.name | 0-u64max |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextLsb | 0-255 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.IEEEextMsn | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.s.nameType | 0-15 |
| HOST_DATA | 0 | phba->sli4_hba.wwpn.u.wwn_be | 0-u64max |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli4_process_missed_mbox_completions() -> (struct lpfc_sli4_hba)->sli4_write_eq_db()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->cfg_irq_chann | 1-u32max |
| PARAM_VALUE | 0 | phba->defer_flogi_acc.ndlp->vport->phba->pcidev->dev.cma_area->available_count | 0-s64max |
| PARAM_VALUE | 0 | phba->hbalock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | phba->sli4_hba.hba_eq_hdl | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->sli4_hba.hdwq | 1-u64max |
| PARAM_VALUE | 0 | phba->sli4_hba.mbx_cq | 4096-ptr_max |
| PARAM_VALUE | 0 | phba->sli_rev | 4 |
| PARAM_VALUE | 0 | phba->worker_thread->sched_class->set_cpus_allowed | 0,1927640468783054848,5094656021401329664,7127180339355369472 |
| PARAM_VALUE | 1 | q | 4096-ptr_max |
| PARAM_VALUE | 2 | count | 0 |
| PARAM_VALUE | 3 | arm | 1 |
| BUF_SIZE | 0 | phba | (-1),128 |
| BUF_SIZE | 0 | phba | (-1),128 |
| CAPPED_DATA | 0 | phba->cfg_irq_chann | 1 |
| CAPPED_DATA | 1 | q->queue_id | 1 |
| DATA_SOURCE | 0 | phba | $0 |
| NOCHECK_CALL |
drivers/scsi/lpfc/lpfc_sli.c lpfc_sli4_stop_polling() -> (struct lpfc_sli4_hba)->sli4_write_eq_db()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phba | 4096-ptr_max |
| PARAM_VALUE | 1 | q | 4096-ptr_max |
| PARAM_VALUE | 1 | q->mode | 0-1 |
| PARAM_VALUE | 1 | q->phba | 4096-ptr_max |
| PARAM_VALUE | 2 | count | 0 |
| PARAM_VALUE | 3 | arm | 1 |
| CAPPED_DATA | 1 | q->mode | 1 |
| DATA_SOURCE | 1 | q | $0 |
| CONTAINER | 0 | -352-312+0 | $(-1) |
| NOCHECK_CALL |