Defined in 14 files as a macro:
-
drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c,
line 82
(as a macro)
-
drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c,
line 86
(as a macro)
-
drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c,
line 80
(as a macro)
-
drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c,
line 84
(as a macro)
-
drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c,
line 82
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_d.h,
line 612
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_d.h,
line 146
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h,
line 157
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_d.h,
line 165
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h,
line 589
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h,
line 62
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h,
line 2164
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h,
line 4048
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h,
line 2484
(as a macro)
Referenced in 7 files: