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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_pcie_host_probe() -> mobiveil_host_init()

Type Parameter Key Value
PARAM_VALUE 0 pcie 4096-ptr_max
PARAM_VALUE 0 pcie->csr_axi_slave_base 4096-ptr_max
PARAM_VALUE 0 pcie->pdev 4096-ptr_max
PARAM_VALUE 0 pcie->pdev->dev.devres_head.prev 4096-ptr_max
PARAM_VALUE 0 pcie->pdev->dev.devres_head.prev->next 4096-ptr_max
PARAM_VALUE 0 pcie->pdev->dev.devres_head.prev->next->next 4096-ptr_max
PARAM_VALUE 0 pcie->pdev->num_resources 1-u32max
PARAM_VALUE 0 pcie->rp.bridge 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.devres_head.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.devres_head.prev 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.dma_io_tlb_mem 1473117533515866112
PARAM_VALUE 0 pcie->rp.bridge->dev.dma_io_tlb_pools.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.dma_io_tlb_pools.prev 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.dma_pools.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.dma_pools.prev 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.dma_uses_io_tlb 0
PARAM_VALUE 0 pcie->rp.bridge->dev.kobj.entry.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.kobj.entry.prev 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.kobj.kref.refcount.refs.counter 1
PARAM_VALUE 0 pcie->rp.bridge->dev.kobj.kset 0,4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.kobj.ktype 5399513539053756416
PARAM_VALUE 0 pcie->rp.bridge->dev.kobj.state_initialized 1
PARAM_VALUE 0 pcie->rp.bridge->dev.links.consumers.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.links.consumers.prev 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.links.defer_sync.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.links.defer_sync.prev 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.links.status 0
PARAM_VALUE 0 pcie->rp.bridge->dev.links.suppliers.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.links.suppliers.prev 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.numa_node (-1)
PARAM_VALUE 0 pcie->rp.bridge->dev.parent 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.power.disable_depth 1
PARAM_VALUE 0 pcie->rp.bridge->dev.power.early_init 1
PARAM_VALUE 0 pcie->rp.bridge->dev.power.entry.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.power.entry.prev 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.power.last_status (-1)
PARAM_VALUE 0 pcie->rp.bridge->dev.power.qos 0
PARAM_VALUE 0 pcie->rp.bridge->dev.power.request 0
PARAM_VALUE 0 pcie->rp.bridge->dev.power.runtime_auto 1
PARAM_VALUE 0 pcie->rp.bridge->dev.power.runtime_status 2
PARAM_VALUE 0 pcie->rp.bridge->dev.power.wait_queue.head.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.power.wait_queue.head.prev 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dev.type 312978283337510912
PARAM_VALUE 0 pcie->rp.bridge->dma_ranges.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->dma_ranges.prev 0,4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->domain_nr (-1)
PARAM_VALUE 0 pcie->rp.bridge->ide_stream_ida.xa.xa_flags 33554437
PARAM_VALUE 0 pcie->rp.bridge->ide_stream_ids_ida.xa.xa_flags 33554437
PARAM_VALUE 0 pcie->rp.bridge->native_aer 1
PARAM_VALUE 0 pcie->rp.bridge->native_cxl_error 1
PARAM_VALUE 0 pcie->rp.bridge->native_dpc 1
PARAM_VALUE 0 pcie->rp.bridge->native_ltr 1
PARAM_VALUE 0 pcie->rp.bridge->native_pcie_hotplug 1
PARAM_VALUE 0 pcie->rp.bridge->native_pme 1
PARAM_VALUE 0 pcie->rp.bridge->native_shpc_hotplug 1
PARAM_VALUE 0 pcie->rp.bridge->nr_ide_streams 256
PARAM_VALUE 0 pcie->rp.bridge->ports.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->ports.prev 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->windows.next 4096-ptr_max
PARAM_VALUE 0 pcie->rp.bridge->windows.prev 0,4096-ptr_max
PARAM_VALUE 0 pcie->rp.config_axi_slave_base 4096-ptr_max
PARAM_VALUE 0 pcie->rp.ob_io_res 4096-ptr_max
PARAM_VALUE 0 pcie->rp.ob_io_res->name 1-u64max
PARAM_VALUE 1 reinit 0
BUF_SIZE 0 pcie 0-1080
BUF_SIZE 0 pcie 0-1080
BUF_SIZE 0 pcie->ops (-1),8
BUF_SIZE 0 pcie->rp.bridge 1984-3064
BUF_SIZE 0 pcie->rp.ops (-1),8
CAPPED_DATA 0 pcie->pdev->num_resources 1
DATA_SOURCE 0 pcie $0
RX_PATH
TASK_NOT_RUNNING

drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c ls_g4_pcie_reinit_hw() -> mobiveil_host_init()

Type Parameter Key Value
PARAM_VALUE 0 pcie 4096-ptr_max
PARAM_VALUE 1 reinit 1
BUF_SIZE 0 pcie 360
NOCHECK_CALL
HALF_LOCKED2 &pool->lock