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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/msm/dp/dp_ctrl.c msm_dp_ctrl_on_link() -> msm_dp_ctrl_enable_mainlink_clocks()

Type Parameter Key Value
PARAM_VALUE 0 ctrl 4096-ptr_max
PARAM_VALUE 0 ctrl->drm_dev 0,4096-ptr_max
PARAM_VALUE 0 ctrl->link 4096-ptr_max
PARAM_VALUE 0 ctrl->link->link_params.num_lanes 0-262143
PARAM_VALUE 1 panel 4096-ptr_max
PARAM_VALUE 1 panel->link_info.num_lanes 0-262143
PARAM_VALUE 1 panel->max_bw_code 0,30
DATA_SOURCE 1 panel $1
BIT_INFO 0 ctrl->link->sink_request 0x0,0xffffffff
HOST_DATA 1 panel->hw_revision 0-u32max
NO_OVERFLOW_SIMPLE 1 panel->drm_edid->size

drivers/gpu/drm/msm/dp/dp_ctrl.c msm_dp_ctrl_prepare_stream_on() -> msm_dp_ctrl_enable_mainlink_clocks()

Type Parameter Key Value
PARAM_VALUE 0 ctrl 4096-ptr_max
PARAM_VALUE 0 ctrl->drm_dev 0,4096-ptr_max
PARAM_VALUE 0 ctrl->link 4096-ptr_max
PARAM_VALUE 0 ctrl->link_clks_on 0
PARAM_VALUE 1 panel->link_info.num_lanes 0-131071
PARAM_VALUE 1 panel->max_bw_code 0,30
DATA_SOURCE 1 panel $1
NO_OVERFLOW_SIMPLE 1 panel->drm_edid->size

drivers/gpu/drm/msm/dp/dp_ctrl.c msm_dp_ctrl_reinitialize_mainlink() -> msm_dp_ctrl_enable_mainlink_clocks()

Type Parameter Key Value
PARAM_VALUE 0 ctrl 4096-ptr_max
PARAM_VALUE 0 ctrl->aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 ctrl->aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 ctrl->aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 ctrl->aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 ctrl->aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 ctrl->aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 ctrl->aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 ctrl->aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 ctrl->core_clks_on 1
PARAM_VALUE 0 ctrl->drm_dev 0,4096-ptr_max
PARAM_VALUE 0 ctrl->link 4096-ptr_max
PARAM_VALUE 0 ctrl->link->link_params.num_lanes 0-131071
PARAM_VALUE 0 ctrl->link->lttpr_count 0-9
PARAM_VALUE 0 ctrl->link->phy_params.p_level 0-3,8-24
PARAM_VALUE 0 ctrl->link->phy_params.v_level 0-3
PARAM_VALUE 0 ctrl->link_clks_on 1
PARAM_VALUE 0 ctrl->num_link_clks 0,2
PARAM_VALUE 0 ctrl->phy 0,4096-ptr_max
PARAM_VALUE 0 ctrl->phy->dev.power.runtime_error s32min-(-17),(-15)-(-14),(-12),(-10)-s32max
PARAM_VALUE 0 ctrl->phy->dev.power.wakeirq->status 0-4294967295
PARAM_VALUE 0 ctrl->phy->pwr 0,4096-ptr_max
PARAM_VALUE 0 ctrl->phy->pwr->enable_count 0-4294967295
PARAM_VALUE 0 ctrl->phy->pwr->rdev->reg_data->lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 ctrl->phy->pwr->rdev->reg_data->lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 ctrl->phy->pwr->rdev->reg_data->lock.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 ctrl->phy->pwr->rdev->reg_data->lock.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 ctrl->phy->pwr->rdev->reg_data->lock.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 ctrl->phy->pwr->rdev->reg_data->lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 ctrl->phy->pwr->rdev->reg_data->regmap->cache->cached_rbnode->base_reg 0-4294967295
PARAM_VALUE 0 ctrl->phy->pwr->rdev->reg_data->regmap->cache->cached_rbnode->blklen 0-4294967295
PARAM_VALUE 0 ctrl->phy->pwr->rdev->regmap->async 0-1
PARAM_VALUE 0 ctrl->phy->pwr->rdev->regmap->cache->cached_rbnode->base_reg 0-4294967295
PARAM_VALUE 0 ctrl->phy->pwr->rdev->regmap->cache->cached_rbnode->blklen 0-4294967295
PARAM_VALUE 0 ctrl->phy->pwr->rdev->regmap->cache->cached_rbnode->node.__rb_parent_color 0-1
PARAM_VALUE 0 ctrl->phy->pwr->rdev->regmap->cache_dirty 0-1
PARAM_VALUE 0 ctrl->phy_opts.dp.lanes 0-131071
PARAM_VALUE 0 *ctrl->aux->hw_mutex.first_waiter->task->blocked_lock.owner (-4611686018427387904)-4611686018427387903
PARAM_VALUE 0 *ctrl->phy->pwr->rdev->reg_data->lp->regmap->cache->data 0-4294967295
PARAM_VALUE 1 panel 4096-ptr_max
PARAM_VALUE 1 panel->link_info.num_lanes 0-524287
PARAM_VALUE 1 panel->max_bw_code 0,30
CAPPED_DATA 0 ctrl->dev 1
CAPPED_DATA 0 ctrl->num_link_clks 1
DATA_SOURCE 0 ctrl $0
DATA_SOURCE 1 panel $1
BIT_INFO 0 ctrl->link->sink_request 0x0,0xffffffff
NO_OVERFLOW_SIMPLE 1 panel->drm_edid->size