Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 3 files:

Smatch caller information:

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp23_bm_set_8pool_mode() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 25360
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1)-s32max
BUF_SIZE 0 priv->bm_pools 0-168,448-3584
BUF_SIZE 0 priv->gop_clk (-1)-s32max
BUF_SIZE 0 priv->mg_clk (-1)-s32max
BUF_SIZE 0 priv->mg_core_clk (-1)-s32max
BUF_SIZE 0 priv->pp_clk (-1)-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
MEM_ZERO 0 priv->bm_pools
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 priv->axi_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->gop_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->pp_clk->core->parent->req_rate

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp23_rx_fifo_fc_en() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pl->phydev_mutex
HALF_LOCKED2 &pl->state_mutex

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_aggr_txq_init() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 8640-8672
BUF_SIZE 0 priv 800
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1)-s32max
BUF_SIZE 0 priv->gop_clk (-1)-s32max
BUF_SIZE 0 priv->mg_clk (-1)-s32max
BUF_SIZE 0 priv->mg_core_clk (-1)-s32max
BUF_SIZE 0 priv->pp_clk (-1)-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $3
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
MEM_ZERO 0 priv
MEM_ZERO 0 priv->aggr_txqs
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_bm_pool_cleanup() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 25088-25340
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1)-s32max
BUF_SIZE 0 priv->gop_clk (-1)-s32max
BUF_SIZE 0 priv->mg_clk (-1)-s32max
BUF_SIZE 0 priv->mg_core_clk (-1)-s32max
BUF_SIZE 0 priv->pp_clk (-1)-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 1 offset 1
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 priv->axi_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->gop_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->pp_clk->core->parent->req_rate

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_bm_pool_create() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 25088-25340
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->bm_pools 0-168,448-3584
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 1 offset 1
DATA_SOURCE 0 priv $1
MEM_ZERO 0 priv->bm_pools
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_bm_pool_destroy() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
BUF_SIZE 0 priv s32min-(-1),1-s32max
BUF_SIZE 0 priv s32min-(-1),1-s32max
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->bm_pools (-1)-168,448-3584
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $1
RX_PATH
TASK_NOT_RUNNING
UNITS 0 priv unit_byte
HALF_LOCKED2 &_dev->mutex

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_check_hw_buf_num() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
BUF_SIZE 0 priv s32min-(-1),1-s32max
BUF_SIZE 0 priv s32min-(-1),1-s32max
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->bm_pools (-1)-168,448-3584
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
UNITS 0 priv unit_byte

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_check_hw_buf_num() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
BUF_SIZE 0 priv s32min-(-1),1-s32max
BUF_SIZE 0 priv s32min-(-1),1-s32max
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->bm_pools (-1)-168,448-3584
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
UNITS 0 priv unit_byte

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_cleanup_txqs() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 34832
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_defaults_set() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 32800
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_defaults_set() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 2048-3068
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_egress_disable() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 32772
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_egress_disable() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 32772
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_ingress_disable() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 2048-3068
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_ingress_enable() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 2048-3068
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_probe() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 20656
BUF_SIZE 0 priv 800
BUF_SIZE 0 priv->axi_clk (-1)-s32max
BUF_SIZE 0 priv->gop_clk (-1)-s32max
BUF_SIZE 0 priv->mg_clk (-1)-s32max
BUF_SIZE 0 priv->mg_core_clk (-1)-s32max
BUF_SIZE 0 priv->pp_clk (-1)-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv r devm_kzalloc
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
MEM_ZERO 0 priv
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_read_index() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
DATA_SOURCE 0 priv $0
DATA_SOURCE 1 offset $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &port->gather_stats_lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_read_stats() -> mvpp2_read()

Type Parameter Key Value
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &port->gather_stats_lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_rxq_long_pool_set() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 2048-3068
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_rxq_offset_set() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_rxq_received() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_rxq_short_pool_set() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 2048-3068
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_set_rxq_free_tresh() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 8268
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_txp_max_tx_size_set() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 32796
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_txp_max_tx_size_set() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 32804
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_txp_max_tx_size_set() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0-32860,32864,2147516512-u32max
CAPPED_DATA 1 offset 1
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c mvpp2_txq_init() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 32832,32836-33852
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_hit_count() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6992
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &s->lock
TYPE_LOCK (struct seq_file)->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6928
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6932
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6936
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6940
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6944
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 7008
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 7012
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 7016
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 7020
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 7024
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6948
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_c2_write() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6948
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1)-s32max
BUF_SIZE 0 priv->gop_clk (-1)-s32max
BUF_SIZE 0 priv->mg_clk (-1)-s32max
BUF_SIZE 0 priv->mg_core_clk (-1)-s32max
BUF_SIZE 0 priv->pp_clk (-1)-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 priv->axi_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->gop_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->pp_clk->core->parent->req_rate

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_flow_hits() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 30468
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &s->lock
TYPE_LOCK (struct seq_file)->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_flow_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6180
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->ethtool->rss_lock
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_flow_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6184
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->ethtool->rss_lock
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_flow_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6188
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->ethtool->rss_lock
HALF_LOCKED2 &s->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_lookup_hits() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 30464
DATA_SOURCE 0 priv $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &s->lock
TYPE_LOCK (struct seq_file)->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_lookup_read() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6168
DATA_SOURCE 0 priv $0

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_oversize_rxq_set() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6608
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c mvpp2_cls_port_config() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 6160
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c __mvpp2_prs_init_from_hw() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 4376
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans (-1),100
BUF_SIZE 0 priv->prs_shadow (-1),5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
LOCK2 bh
HALF_LOCKED2 &priv->prs_spinlock
HALF_LOCKED2 &s->lock
HALF_LOCKED2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c __mvpp2_prs_init_from_hw() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 4356-4376
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans (-1),100
BUF_SIZE 0 priv->prs_shadow (-1),5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
LOCK2 bh
HALF_LOCKED2 &priv->prs_spinlock
HALF_LOCKED2 &s->lock
HALF_LOCKED2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c __mvpp2_prs_init_from_hw() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 4612-4624
BUF_SIZE 0 priv->aggr_txqs (-1),504
BUF_SIZE 0 priv->axi_clk (-1),1-s32max
BUF_SIZE 0 priv->gop_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_clk (-1),1-s32max
BUF_SIZE 0 priv->mg_core_clk (-1),1-s32max
BUF_SIZE 0 priv->pp_clk (-1),1-s32max
BUF_SIZE 0 priv->prs_double_vlans (-1),100
BUF_SIZE 0 priv->prs_shadow (-1),5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
DATA_SOURCE 0 priv $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
LOCK2 bh
HALF_LOCKED2 &priv->prs_spinlock
HALF_LOCKED2 &s->lock
HALF_LOCKED2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_hits() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 4676
DATA_SOURCE 0 priv $0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
LOCK2 &s->lock
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock
TYPE_LOCK (struct seq_file)->lock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_hw_port_init() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 4096
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1)-s32max
BUF_SIZE 0 priv->gop_clk (-1)-s32max
BUF_SIZE 0 priv->mg_clk (-1)-s32max
BUF_SIZE 0 priv->mg_core_clk (-1)-s32max
BUF_SIZE 0 priv->pp_clk (-1)-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
MEM_ZERO 0 priv
MEM_ZERO 0 priv->aggr_txqs
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 priv->axi_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->gop_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->pp_clk->core->parent->req_rate
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_hw_port_init() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 4108,4112
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1)-s32max
BUF_SIZE 0 priv->gop_clk (-1)-s32max
BUF_SIZE 0 priv->mg_clk (-1)-s32max
BUF_SIZE 0 priv->mg_core_clk (-1)-s32max
BUF_SIZE 0 priv->pp_clk (-1)-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
MEM_ZERO 0 priv
MEM_ZERO 0 priv->aggr_txqs
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 priv->axi_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->gop_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->pp_clk->core->parent->req_rate
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_hw_port_init() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 4100,4104
BUF_SIZE 0 priv->aggr_txqs 504
BUF_SIZE 0 priv->axi_clk (-1)-s32max
BUF_SIZE 0 priv->gop_clk (-1)-s32max
BUF_SIZE 0 priv->mg_clk (-1)-s32max
BUF_SIZE 0 priv->mg_core_clk (-1)-s32max
BUF_SIZE 0 priv->pp_clk (-1)-s32max
BUF_SIZE 0 priv->prs_double_vlans 100
BUF_SIZE 0 priv->prs_shadow 5120
BUF_SIZE 0 priv->sysctrl_base (-1)-s32max
CAPPED_DATA 0 priv->nthreads 1
DATA_SOURCE 0 priv $0
BIT_INFO 0 priv->max_port_rxqs 0x0,0x28
MEM_ZERO 0 priv
MEM_ZERO 0 priv->aggr_txqs
MEM_ZERO 0 priv->prs_double_vlans
MEM_ZERO 0 priv->prs_shadow
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 priv->axi_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->gop_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->mg_core_clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 priv->pp_clk->core->parent->req_rate
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_enable_filtering() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
HALF_LOCKED2 global &rtnl_mutex
TYPE_LOCK (struct mvpp2)->prs_spinlock

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_entry_add() -> mvpp2_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
LOCK2 bh
LOCK2 0 &priv->prs_spinlock
TYPE_LOCK (struct mvpp2)->prs_spinlock