Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 8 files:
- drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c, line 410
- drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.c, line 155
- drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c, line 490
- drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c, line 236
- drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c, line 341
- drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c, line 583
- drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c, line 509
- drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c, line 242
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c update_dsc_on_stream() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | dsc_mode | 1-2 |
| PARAM_VALUE | 3 | dsc_slice_width | 0-u16max |
| FUZZY_MAX | 1 | dsc_mode | 2 |
| CONTAINER | 0 | *(-488-0+0) | $(-1) |
| HARD_MAX | 1 | dsc_mode | 2 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c update_dsc_on_stream() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | dsc_mode | 0 |
| PARAM_VALUE | 2 | dsc_bytes_per_pixel | 0 |
| PARAM_VALUE | 3 | dsc_slice_width | 0 |
| CONTAINER | 0 | *(-488-0+0) | $(-1) |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c link_set_dsc_on_stream() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs->set_dsc_config | 0,3598303988052037632,8603795597491806208 |
| PARAM_VALUE | 0 | optc->funcs->set_odm_bypass | 0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216 |
| PARAM_VALUE | 0 | optc->funcs->set_out_mux | 0,400365980042444800,1252548466178600960 |
| PARAM_VALUE | 0 | optc->funcs->set_static_screen_control | 0,5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | dsc_mode | 1-2 |
| PARAM_VALUE | 3 | dsc_slice_width | 0-u16max |
| FUZZY_MAX | 1 | dsc_mode | 2 |
| CONTAINER | 0 | *(-488-0+0) | $(-1) |
| HARD_MAX | 1 | dsc_mode | 2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c link_set_dsc_on_stream() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs->set_dsc_config | 0,3598303988052037632,8603795597491806208 |
| PARAM_VALUE | 0 | optc->funcs->set_odm_bypass | 0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216 |
| PARAM_VALUE | 0 | optc->funcs->set_out_mux | 0,400365980042444800,1252548466178600960 |
| PARAM_VALUE | 0 | optc->funcs->set_static_screen_control | 0,5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | dsc_mode | 0 |
| PARAM_VALUE | 2 | dsc_bytes_per_pixel | 0 |
| PARAM_VALUE | 3 | dsc_slice_width | 0 |
| CONTAINER | 0 | *(-488-0+0) | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c clean_up_dsc_blocks() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs->set_dsc_config | 3598303988052037632,8603795597491806208 |
| PARAM_VALUE | 1 | dsc_mode | 0 |
| PARAM_VALUE | 2 | dsc_bytes_per_pixel | 0 |
| PARAM_VALUE | 3 | dsc_slice_width | 0 |
| CONTAINER | 0 | -488-0+0 | $(-1) |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn31/dcn31_hwseq.c dcn31_reset_back_end_for_pipe() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | dsc_mode | 0 |
| PARAM_VALUE | 2 | dsc_bytes_per_pixel | 0 |
| PARAM_VALUE | 3 | dsc_slice_width | 0 |
| CONTAINER | 0 | *(-488-0+0) | $(-1) |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn314/dcn314_hwseq.c update_dsc_on_stream() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | dsc_mode | 1-2 |
| PARAM_VALUE | 3 | dsc_slice_width | 0-u16max |
| FUZZY_MAX | 1 | dsc_mode | 2 |
| CONTAINER | 0 | *(-488-0+0) | $(-1) |
| HARD_MAX | 1 | dsc_mode | 2 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn314/dcn314_hwseq.c update_dsc_on_stream() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | dsc_mode | 0 |
| PARAM_VALUE | 2 | dsc_bytes_per_pixel | 0 |
| PARAM_VALUE | 3 | dsc_slice_width | 0 |
| CONTAINER | 0 | *(-488-0+0) | $(-1) |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_hw_sequencer.c hwss_tg_set_dsc_config() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs->set_dsc_config | 3598303988052037632,8603795597491806208 |
| PARAM_VALUE | 1 | dsc_mode | 0-2 |
| PARAM_VALUE | 3 | dsc_slice_width | 0 |
| FUZZY_MAX | 1 | dsc_mode | 2 |
| CONTAINER | 0 | -488-0+0 | $(-1) |
| HARD_MAX | 1 | dsc_mode | 2 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn32/dcn32_hwseq.c dcn32_update_dsc_on_stream() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | dsc_mode | 1-2 |
| PARAM_VALUE | 3 | dsc_slice_width | 0-u16max |
| FUZZY_MAX | 1 | dsc_mode | 2 |
| CONTAINER | 0 | *(-488-0+0) | $(-1) |
| HARD_MAX | 1 | dsc_mode | 2 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn32/dcn32_hwseq.c dcn32_update_dsc_on_stream() -> (struct timing_generator_funcs)->set_dsc_config()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | optc | 4096-ptr_max |
| PARAM_VALUE | 0 | optc->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | dsc_mode | 0 |
| PARAM_VALUE | 2 | dsc_bytes_per_pixel | 0 |
| PARAM_VALUE | 3 | dsc_slice_width | 0 |
| CONTAINER | 0 | *(-488-0+0) | $(-1) |
| NOCHECK_CALL |