| PARAM_VALUE |
0 |
dev_priv |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm->dev->devres_head.prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm->dev->devres_head.prev->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm->dev->devres_head.prev->next->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->parent |
6551493560102297600 |
| PARAM_VALUE |
0 |
dev_priv->vbt.bdb_blocks.next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.bdb_blocks.next->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.bdb_blocks.prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.bdb_blocks.prev->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.bdb_blocks.prev->next->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.bdb_blocks.prev->prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.crt_ddc_pin |
2 |
| PARAM_VALUE |
0 |
dev_priv->vbt.display_devices.next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.display_devices.next->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.display_devices.prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.display_devices.prev->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.display_devices.prev->prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->vbt.int_crt_support |
1 |
| PARAM_VALUE |
0 |
dev_priv->vbt.int_lvds_support |
1 |
| PARAM_VALUE |
0 |
dev_priv->vbt.int_tv_support |
1 |
| PARAM_VALUE |
0 |
dev_priv->vbt.lvds_ssc_freq |
48000,66667,96000,100000,120000 |
| PARAM_VALUE |
0 |
dev_priv->vbt.lvds_use_ssc |
1 |
| PARAM_VALUE |
0 |
*dev_priv->bw.peakbw |
0-4294967295 |
| PARAM_VALUE |
0 |
*dev_priv->bw.psf_bw |
0-4294967295 |
| BUF_SIZE |
0 |
dev_priv |
8416 |
| DATA_SOURCE |
0 |
dev_priv |
$0 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| NO_OVERFLOW_SIMPLE |
0 |
dev_priv->drm->num_crtcs |
|
| HALF_LOCKED2 |
|
&pdev->dev.mutex |
|
| HALF_LOCKED2 |
|
&pool->lock |
|