Open Menu /

Defined in 1 files as a macro:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/clk/pistachio/clk-pll.c pll_frac_set_mode() -> pll_writel()

Type Parameter Key Value
PARAM_VALUE 0 pll 4096-ptr_max
PARAM_VALUE 2 reg 12
DATA_SOURCE 0 pll r to_pistachio_pll
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 val 0-u32max

drivers/clk/pistachio/clk-pll.c pll_gf40lp_frac_disable() -> pll_writel()

Type Parameter Key Value
PARAM_VALUE 0 pll 4096-ptr_max
PARAM_VALUE 2 reg 12
DATA_SOURCE 0 pll r to_pistachio_pll
BIT_INFO 1 val 0x1,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 val 0-u32max
HALF_LOCKED2 flags

drivers/clk/pistachio/clk-pll.c pll_gf40lp_frac_enable() -> pll_writel()

Type Parameter Key Value
PARAM_VALUE 0 pll 4096-ptr_max
PARAM_VALUE 1 val 0,2-4294967238
PARAM_VALUE 2 reg 12
DATA_SOURCE 0 pll r to_pistachio_pll
BIT_INFO 1 val 0x0,0xffffffc6
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 val 0,2-4294967238[c]

drivers/clk/pistachio/clk-pll.c pll_gf40lp_frac_enable() -> pll_writel()

Type Parameter Key Value
PARAM_VALUE 0 pll 4096-ptr_max
PARAM_VALUE 1 val 0-4026531839
PARAM_VALUE 2 reg 16
DATA_SOURCE 0 pll r to_pistachio_pll
BIT_INFO 1 val 0x0,0xefffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 val 0-4026531839[c]

drivers/clk/pistachio/clk-pll.c pll_gf40lp_frac_set_rate() -> pll_writel()

Type Parameter Key Value
PARAM_VALUE 0 pll 4096-ptr_max
PARAM_VALUE 2 reg 4
CAPPED_DATA 0 pll->nr_rates 1
DATA_SOURCE 0 pll r to_pistachio_pll
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 val 0-u32max[c]

drivers/clk/pistachio/clk-pll.c pll_gf40lp_frac_set_rate() -> pll_writel()

Type Parameter Key Value
PARAM_VALUE 0 pll 4096-ptr_max
PARAM_VALUE 2 reg 8
CAPPED_DATA 0 pll->nr_rates 1
DATA_SOURCE 0 pll r to_pistachio_pll
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 val 0-u32max[c]

drivers/clk/pistachio/clk-pll.c pll_gf40lp_laint_disable() -> pll_writel()

Type Parameter Key Value
PARAM_VALUE 0 pll 4096-ptr_max
PARAM_VALUE 2 reg 4
DATA_SOURCE 0 pll r to_pistachio_pll
BIT_INFO 1 val 0x1000000,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 val 0-u32max
HALF_LOCKED2 flags

drivers/clk/pistachio/clk-pll.c pll_gf40lp_laint_enable() -> pll_writel()

Type Parameter Key Value
PARAM_VALUE 0 pll 4096-ptr_max
PARAM_VALUE 1 val 0-4076863487
PARAM_VALUE 2 reg 4
DATA_SOURCE 0 pll r to_pistachio_pll
BIT_INFO 1 val 0x0,0xf2ffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 val 0-4076863487[c]

drivers/clk/pistachio/clk-pll.c pll_gf40lp_laint_enable() -> pll_writel()

Type Parameter Key Value
PARAM_VALUE 0 pll 4096-ptr_max
PARAM_VALUE 1 val 0-4026531839
PARAM_VALUE 2 reg 8
DATA_SOURCE 0 pll r to_pistachio_pll
BIT_INFO 1 val 0x0,0xefffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 val 0-4026531839[c]

drivers/clk/pistachio/clk-pll.c pll_gf40lp_laint_set_rate() -> pll_writel()

Type Parameter Key Value
PARAM_VALUE 0 pll 4096-ptr_max
PARAM_VALUE 2 reg 4
CAPPED_DATA 0 pll->nr_rates 1
DATA_SOURCE 0 pll r to_pistachio_pll
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 val 0-u32max[c]