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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c dpu_encoder_phys_vid_setup_timing_engine() -> programmable_fetch_config()

Type Parameter Key Value
PARAM_VALUE 0 phys_enc 4096-ptr_max
PARAM_VALUE 0 phys_enc->dpu_kms->base.dev 0,4096-ptr_max
PARAM_VALUE 0 phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver 0-10,12-13
PARAM_VALUE 0 phys_enc->enc_spinlock 4096-ptr_max
PARAM_VALUE 0 phys_enc->enc_spinlock->rlock.dep_map->name 0-255
PARAM_VALUE 0 phys_enc->hw_cdm 0,4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_ctl 4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_ctl->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->hw_ctl->ops.setup_intf_cfg 3325923849600159744,7213769090081382400
PARAM_VALUE 0 phys_enc->hw_intf 4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_intf->cap->type 0-1,3,10
PARAM_VALUE 0 phys_enc->hw_intf->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->hw_intf->mdss_ver->core_major_ver 1,3-10,12-13
PARAM_VALUE 0 phys_enc->hw_intf->ops.bind_pingpong_blk 3035196883863601152
PARAM_VALUE 0 phys_enc->hw_intf->ops.enable_timing 3538371962127917056
PARAM_VALUE 0 phys_enc->hw_intf->ops.setup_timing_gen 7542549359853207552
PARAM_VALUE 0 phys_enc->hw_mdptop->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->hw_pp 4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_pp->merge_3d 0,4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_pp->merge_3d->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->ops.enable 4096-ptr_max
PARAM_VALUE 1 timing 8029863833206099968
PARAM_VALUE 1 timing->h_back_porch 0-u16max
PARAM_VALUE 1 timing->h_front_porch 0-u16max
PARAM_VALUE 1 timing->height 0-u16max
PARAM_VALUE 1 timing->hsync_polarity 0-1
PARAM_VALUE 1 timing->hsync_pulse_width 0-u16max
PARAM_VALUE 1 timing->hsync_skew 0-u16max
PARAM_VALUE 1 timing->underflow_clr 0,255
PARAM_VALUE 1 timing->v_back_porch 0-131070
PARAM_VALUE 1 timing->v_front_porch 0-u16max
PARAM_VALUE 1 timing->vsync_polarity 0-1
PARAM_VALUE 1 timing->vsync_pulse_width 0-u16max
PARAM_VALUE 1 timing->width 0
PARAM_VALUE 1 timing->xres 0
PARAM_VALUE 1 timing->yres 0-u16max
DATA_SOURCE 0 phys_enc $0
MEM_ZERO 1 timing
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &dpu_enc->enc_lock
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex
TYPE_LOCK (struct dpu_encoder_virt)->enc_lock