| PARAM_VALUE |
0 |
hdw |
4096-ptr_max |
| PARAM_VALUE |
0 |
hdw->big_lock_held |
1 |
| PARAM_VALUE |
0 |
hdw->big_lock_mutex.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
hdw->big_lock_mutex.first_waiter |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
hdw->big_lock_mutex.first_waiter->list.prev->next |
5159360019465732096 |
| PARAM_VALUE |
0 |
hdw->big_lock_mutex.first_waiter->list.prev->prev |
5159360019465732096 |
| PARAM_VALUE |
0 |
hdw->big_lock_mutex.osq.tail.counter |
0-s32max |
| PARAM_VALUE |
0 |
hdw->big_lock_mutex.wait_lock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
hdw->big_lock_mutex.wait_lock.owner |
(-1) |
| PARAM_VALUE |
0 |
hdw->big_lock_mutex.wait_lock.owner_cpu |
u32max |
| PARAM_VALUE |
0 |
hdw->enc_ctl_state.is_50hz |
0-1 |
| PARAM_VALUE |
0 |
hdw->enc_ctl_state.port |
1 |
| PARAM_VALUE |
0 |
hdw->flag_ok |
s32min-(-1),1-s32max |
| PARAM_VALUE |
0 |
hdw->fw1_state |
4 |
| PARAM_VALUE |
0 |
hdw->pathway_state |
1 |
| PARAM_VALUE |
0 |
hdw->state_encoder_config |
0 |
| PARAM_VALUE |
0 |
hdw->state_encoder_ok |
s32min-(-1),1-s32max |
| PARAM_VALUE |
0 |
hdw->state_encoder_waitok |
s32min-(-1),1-s32max |
| PARAM_VALUE |
0 |
hdw->state_pathway_ok |
s32min-(-1),1-s32max |
| PARAM_VALUE |
0 |
hdw->state_pipeline_config |
s32min-(-1),1-s32max |
| PARAM_VALUE |
0 |
hdw->state_pipeline_idle |
s32min-(-1),1-s32max |
| PARAM_VALUE |
0 |
hdw->state_pipeline_pause |
0 |
| PARAM_VALUE |
0 |
hdw->state_pipeline_req |
s32min-(-1),1-s32max |
| PARAM_VALUE |
0 |
hdw->state_stale |
s32min-(-1),1-s32max |
| DATA_SOURCE |
0 |
hdw |
$0 |
| FUZZY_MAX |
0 |
hdw->enc_ctl_state.is_50hz |
1 |
| HARD_MAX |
0 |
hdw->enc_ctl_state.is_50hz |
1 |
| LOCK2 |
|
&pool->lock |
|
| LOCK2 |
0 |
&hdw->big_lock_mutex |
|
| TYPE_LOCK |
|
(struct pvr2_hdw)->big_lock_mutex |
|
