Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 6 files:
- drivers/gpu/drm/amd/display/dc/core/dc_resource.c
- drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
- drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c
- drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
- drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
- drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_update_odm() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->plane_res.hubp->funcs->hubp_wait_pipe_read_start | 0,8092735316039704576 |
| PARAM_VALUE | 0 | otg_master->update_flags.bits.odm | 1 |
| PARAM_VALUE | 1 | is_last_segment | 0 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_update_odm() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->plane_res.hubp->funcs->hubp_wait_pipe_read_start | 0,8092735316039704576 |
| PARAM_VALUE | 1 | is_last_segment | 1 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_resource.c resource_get_odm_slice_dst_rect() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->prev_odm_pipe | 0 |
| PARAM_VALUE | 1 | is_last_segment | 0 |
| BUF_SIZE | 0 | otg_master | (-1),24624 |
| BUF_SIZE | 0 | otg_master | (-1),24624 |
| DATA_SOURCE | 0 | otg_master | r resource_get_otg_master |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_resource.c resource_get_odm_slice_dst_rect() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| BUF_SIZE | 0 | otg_master | (-1),24624 |
| BUF_SIZE | 0 | otg_master | (-1),24624 |
| DATA_SOURCE | 0 | otg_master | r resource_get_otg_master |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_enable_stream_timing() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream->link | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.audio->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.audio->funcs->az_disable_hbr_audio | 5077894766283632640 |
| PARAM_VALUE | 0 | otg_master->stream_res.opp->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.tg | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.tg->funcs->set_static_screen_control | 0,5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 0 | otg_master->top_pipe | 0 |
| PARAM_VALUE | 1 | is_last_segment | 0 |
| CAPPED_DATA | 0 | otg_master->stream->link | 1 |
| DATA_SOURCE | 0 | otg_master | $0 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_enable_stream_timing() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.deepsleep_dcfclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.mem_trip_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.t_extra_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.t_mclk_wm_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.t_sr_wm_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.t_urg_wm_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.total_flip_bw | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.clks_cfg.dcfclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.clks_cfg.dispclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.clks_cfg.dppclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.clks_cfg.refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.clks_cfg.socclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.dout.output_bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.dout.wb.wb_hratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.dout.wb.wb_vratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.dest.pixel_rate_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.hscl_ratio_c | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vinit | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vinit_bot | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vinit_bot_c | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vinit_c | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vscl_ratio_c | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.src.dcc_fraction_of_zs_req_chroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.src.dcc_fraction_of_zs_req_luma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.src.xfc_params.xfc_tslv_vready_offset_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.src.xfc_params.xfc_tslv_vupdate_offset_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.src.xfc_params.xfc_tslv_vupdate_width_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->pipe_dlg_param.pixel_rate_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->stream->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream->link | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.audio->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.audio->funcs->az_disable_hbr_audio | 5077894766283632640 |
| PARAM_VALUE | 0 | otg_master->stream_res.opp->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.tg->funcs->set_static_screen_control | 0,5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | is_last_segment | 1 |
| DATA_SOURCE | 0 | otg_master | $0 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_update_odm() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->plane_res.hubp->funcs->hubp_wait_pipe_read_start | 0,8092735316039704576 |
| PARAM_VALUE | 0 | otg_master->stream_res.opp | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->update_flags.bits.odm | 1 |
| PARAM_VALUE | 1 | is_last_segment | 0 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_update_odm() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->plane_res.hubp->funcs->hubp_wait_pipe_read_start | 0,8092735316039704576 |
| PARAM_VALUE | 1 | is_last_segment | 1 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_enable_stream_timing() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->prev_odm_pipe | 0 |
| PARAM_VALUE | 0 | otg_master->stream | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream->link | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream->link->phy_state.symclk_ref_cnts.otg | 1 |
| PARAM_VALUE | 0 | otg_master->stream->link->phy_state.symclk_state | 1-2 |
| PARAM_VALUE | 0 | otg_master->stream_res.audio->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.audio->funcs->az_disable_hbr_audio | 5077894766283632640 |
| PARAM_VALUE | 0 | otg_master->stream_res.opp->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.tg | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.tg->funcs->set_static_screen_control | 0,5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 0 | otg_master->top_pipe | 0 |
| PARAM_VALUE | 1 | is_last_segment | 0 |
| CAPPED_DATA | 0 | otg_master->stream->link | 1 |
| DATA_SOURCE | 0 | otg_master | $0 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_enable_stream_timing() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.deepsleep_dcfclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.mem_trip_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.t_extra_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.t_mclk_wm_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.t_sr_wm_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.t_urg_wm_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_dlg_sys_param.total_flip_bw | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.clks_cfg.dcfclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.clks_cfg.dispclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.clks_cfg.dppclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.clks_cfg.refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.clks_cfg.socclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.dout.output_bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.dout.wb.wb_hratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.dout.wb.wb_vratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.dest.pixel_rate_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.hscl_ratio_c | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vinit | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vinit_bot | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vinit_bot_c | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vinit_c | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.scale_ratio_depth.vscl_ratio_c | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.src.dcc_fraction_of_zs_req_chroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.src.dcc_fraction_of_zs_req_luma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.src.xfc_params.xfc_tslv_vready_offset_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.src.xfc_params.xfc_tslv_vupdate_offset_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->dml_input.pipe.src.xfc_params.xfc_tslv_vupdate_width_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->pipe_dlg_param.pixel_rate_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | otg_master->stream->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream->link | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream->link->phy_state.symclk_ref_cnts.otg | 1 |
| PARAM_VALUE | 0 | otg_master->stream->link->phy_state.symclk_state | 1-2 |
| PARAM_VALUE | 0 | otg_master->stream_res.audio->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.audio->funcs->az_disable_hbr_audio | 5077894766283632640 |
| PARAM_VALUE | 0 | otg_master->stream_res.opp->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->stream_res.tg->funcs->set_static_screen_control | 0,5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | is_last_segment | 1 |
| DATA_SOURCE | 0 | otg_master | $0 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_update_odm() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->plane_res.hubp->funcs->hubp_wait_pipe_read_start | 0,8092735316039704576 |
| PARAM_VALUE | 0 | otg_master->update_flags.bits.odm | 1 |
| PARAM_VALUE | 1 | is_last_segment | 0 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_update_odm() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->plane_res.hubp->funcs->hubp_wait_pipe_read_start | 0,8092735316039704576 |
| PARAM_VALUE | 1 | is_last_segment | 1 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_update_odm_sequence() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->update_flags.bits.odm | 1 |
| PARAM_VALUE | 1 | is_last_segment | 0 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_update_odm_sequence() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 1 | is_last_segment | 1 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn314/dcn314_hwseq.c dcn314_update_odm() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->plane_res.hubp->funcs->hubp_wait_pipe_read_start | 0,8092735316039704576 |
| PARAM_VALUE | 0 | otg_master->update_flags.bits.odm | 1 |
| PARAM_VALUE | 1 | is_last_segment | 0 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn314/dcn314_hwseq.c dcn314_update_odm() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->plane_res.hubp->funcs->hubp_wait_pipe_read_start | 0,8092735316039704576 |
| PARAM_VALUE | 1 | is_last_segment | 1 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn32/dcn32_hwseq.c dcn32_update_odm() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->plane_res.hubp->funcs->hubp_wait_pipe_read_start | 0,8092735316039704576 |
| PARAM_VALUE | 0 | otg_master->update_flags.bits.odm | 1 |
| PARAM_VALUE | 1 | is_last_segment | 0 |
| DATA_SOURCE | 0 | otg_master | $2 |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn32/dcn32_hwseq.c dcn32_update_odm() -> resource_get_odm_slice_dst_width()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | otg_master | 4096-ptr_max |
| PARAM_VALUE | 0 | otg_master->plane_res.hubp->funcs->hubp_wait_pipe_read_start | 0,8092735316039704576 |
| PARAM_VALUE | 1 | is_last_segment | 1 |
| DATA_SOURCE | 0 | otg_master | $2 |