drivers/clk/renesas/rzg2l-cpg.c rzg2l_cpg_register_mod_clk() -> rzg2l_mod_clock_is_enabled()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw	4096-ptr_max
PARAM_VALUE	0	hw->clk	0,4096-ptr_max,(-12)
PARAM_VALUE	0	hw->init	0,7933591591414239232
MEM_ZERO	0	hw
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TASK_NOT_RUNNING

drivers/clk/renesas/rzg2l-cpg.c rzg2l_mod_clock_init_mstop_helper() -> rzg2l_mod_clock_is_enabled()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw	4096-ptr_max
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LOCK2		&priv->rmw_lock
LOCK2		irq
TYPE_LOCK		(struct rzg2l_cpg_priv)->rmw_lock

drivers/clk/renesas/rzg2l-cpg.c rzg2l_mod_enable_crit_clock_init_mstop() -> rzg2l_mod_clock_is_enabled()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw->core	4096-ptr_max
RX_PATH
TASK_NOT_RUNNING

drivers/clk/ti/adpll.c ti_adpll_clkout_is_enabled() -> (struct clk_ops)->is_enabled()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw	4096-ptr_max
BUF_SIZE	0	hw	24
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TASK_NOT_RUNNING

drivers/clk/clk.c clk_core_is_enabled() -> (struct clk_ops)->is_enabled()

Type	Parameter	Key	Value
CONTAINER	0	*(-48-8+16)	$(-1)
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HALF_LOCKED2		flags

drivers/clk/imx/clk-gate-exclusive.c clk_gate_exclusive_is_enabled() -> (struct clk_ops)->is_enabled()

Type	Parameter	Key	Value
BUF_SIZE	0	hw	(-1),24
BUF_SIZE	0	hw	(-1),24
DATA_SOURCE	0	hw	$0
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TASK_NOT_RUNNING

drivers/clk/imx/clk-composite-7ulp.c pcc_gate_is_enabled() -> (struct clk_ops)->is_enabled()

Type	Parameter	Key	Value
BUF_SIZE	0	hw	(-1),24
BUF_SIZE	0	hw	(-1),24
DATA_SOURCE	0	hw	$0
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TASK_NOT_RUNNING

drivers/clk/clk-composite.c clk_composite_is_enabled() -> (struct clk_ops)->is_enabled()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw	4096-ptr_max
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