Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 2 files:
Smatch caller information:
drivers/crypto/hisilicon/sec2/sec_crypto.c sec_register_to_crypto() -> sec_get_alg_bitmap()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | qm | 4096-ptr_max |
| PARAM_VALUE | 0 | qm->cap_tables.dev_cap_table | 4096-ptr_max |
| PARAM_VALUE | 1 | high | 9 |
| PARAM_VALUE | 2 | low | 8 |
| BUF_SIZE | 0 | qm | 2112 |
| CAPPED_DATA | 0 | qm | 1 |
| CAPPED_DATA | 0 | qm->poll_data | 1 |
| CAPPED_DATA | 0 | qm->qp_array | 1 |
| CAPPED_DATA | 0 | qm->qp_num | 1 |
| DATA_SOURCE | 0 | qm | $0 |
| MEM_ZERO | 0 | qm | |
| MEM_ZERO | 0 | qm->qdma.va | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | qm->aeq_depth | 0-u16max[c] |
| HOST_DATA | 0 | qm->aeqe_dma | 0-u64max[c] |
| HOST_DATA | 0 | qm->cap_ver | 0-1 |
| HOST_DATA | 0 | qm->cqc_dma | 0-u64max[c] |
| HOST_DATA | 0 | qm->eq_depth | 0-u16max[c] |
| HOST_DATA | 0 | qm->pdev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | qm->pdev->class | 0-16777215 |
| HOST_DATA | 0 | qm->pdev->current_state | 0-3[c] |
| HOST_DATA | 0 | qm->pdev->devcap | 0-u32max |
| HOST_DATA | 0 | qm->pdev->devfn | 0-503[c] |
| HOST_DATA | 0 | qm->pdev->device | 0-u16max |
| HOST_DATA | 0 | qm->pdev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | qm->pdev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->irq | 0-255 |
| HOST_DATA | 0 | qm->pdev->is_cxl | 0-1 |
| HOST_DATA | 0 | qm->pdev->multifunction | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | qm->pdev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | qm->pdev->pin | 0 |
| HOST_DATA | 0 | qm->pdev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->revision | 0-31,33-255 |
| HOST_DATA | 0 | qm->pdev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | qm->pdev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | qm->pdev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | qm->pdev->transparent | 0[c] |
| HOST_DATA | 0 | qm->pdev->vendor | 0-u16max |
| HOST_DATA | 0 | qm->qdma.size | 0,32-274878431104[c] |
| HOST_DATA | 0 | qm->qp_idr.idr_rt.xa_flags | 0,33554432-u32max |
| HOST_DATA | 0 | qm->sqc_dma | 0-u64max[c] |
| NO_OVERFLOW_SIMPLE | 0 | qm->cap_tables.dev_cap_size | |
| NO_OVERFLOW_SIMPLE | 0 | qm->cap_tables.qm_cap_size | |
| NO_OVERFLOW_SIMPLE | 0 | qm->qp_num | |
| HALF_LOCKED2 | &pool->lock |
drivers/crypto/hisilicon/sec2/sec_crypto.c sec_unregister_from_crypto() -> sec_get_alg_bitmap()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | qm | 4096-ptr_max |
| PARAM_VALUE | 1 | high | 9 |
| PARAM_VALUE | 2 | low | 8 |
| BUF_SIZE | 0 | qm | s32min-(-2),1-s32max |
| BUF_SIZE | 0 | qm | s32min-(-2),1-s32max |
| CAPPED_DATA | 0 | qm | 1 |
| DATA_SOURCE | 0 | qm | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | qm->aeq_depth | 0-u16max[c] |
| HOST_DATA | 0 | qm->aeqe_dma | 0-u64max[c] |
| HOST_DATA | 0 | qm->cap_ver | 0-1 |
| HOST_DATA | 0 | qm->cqc_dma | 0-u64max[c] |
| HOST_DATA | 0 | qm->eq_depth | 0-u16max[c] |
| HOST_DATA | 0 | qm->pdev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | qm->pdev->class | 0-16777215 |
| HOST_DATA | 0 | qm->pdev->current_state | 0-3[c] |
| HOST_DATA | 0 | qm->pdev->devcap | 0-u32max |
| HOST_DATA | 0 | qm->pdev->devfn | 0-503[c] |
| HOST_DATA | 0 | qm->pdev->device | 0-u16max |
| HOST_DATA | 0 | qm->pdev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | qm->pdev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->irq | 0-255 |
| HOST_DATA | 0 | qm->pdev->is_cxl | 0-1 |
| HOST_DATA | 0 | qm->pdev->multifunction | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | qm->pdev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | qm->pdev->pin | 0 |
| HOST_DATA | 0 | qm->pdev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->revision | 0-31,33-255 |
| HOST_DATA | 0 | qm->pdev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | qm->pdev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | qm->pdev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | qm->pdev->transparent | 0[c] |
| HOST_DATA | 0 | qm->pdev->vendor | 0-u16max |
| HOST_DATA | 0 | qm->qdma.size | 0,32-274878431104[c] |
| HOST_DATA | 0 | qm->qp_idr.idr_rt.xa_flags | 0,33554432-u32max |
| HOST_DATA | 0 | qm->sqc_dma | 0-u64max[c] |
| NO_OVERFLOW_SIMPLE | 0 | qm->cap_tables.dev_cap_size | |
| NO_OVERFLOW_SIMPLE | 0 | qm->cap_tables.qm_cap_size | |
| NO_OVERFLOW_SIMPLE | 0 | qm->qp_num | |
| NO_OVERFLOW_SIMPLE | 0 | qm->uacce->cdev->count |
drivers/crypto/hisilicon/sec2/sec_main.c sec_qm_init() -> sec_get_alg_bitmap()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | qm | 4096-ptr_max |
| PARAM_VALUE | 1 | high | 11 |
| PARAM_VALUE | 2 | low | 10 |
| BUF_SIZE | 0 | qm | 2112 |
| BUF_SIZE | 0 | qm->dev_name | 10 |
| BUF_SIZE | 0 | qm->err_ini | (-1),128 |
| BUF_SIZE | 0 | qm->pdev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,7472,8064 |
| BUF_SIZE | 0 | qm->qm_list | (-1),184 |
| CAPPED_DATA | 0 | qm->pdev | 1 |
| DATA_SOURCE | 0 | qm | $0 |
| MEM_ZERO | 0 | qm | |
| MEM_ZERO | 0 | qm->pdev | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | qm->aeq_depth | 0-u16max[c] |
| HOST_DATA | 0 | qm->aeqe_dma | 0-u64max[c] |
| HOST_DATA | 0 | qm->cap_ver | 0-1 |
| HOST_DATA | 0 | qm->cqc_dma | 0-u64max[c] |
| HOST_DATA | 0 | qm->debug.curr_qm_qp_num | 0-s32max[c] |
| HOST_DATA | 0 | qm->eq_depth | 0-u16max[c] |
| HOST_DATA | 0 | qm->pdev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | qm->pdev->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | qm->pdev->class | 0-16777215 |
| HOST_DATA | 0 | qm->pdev->current_state | 0-3[c] |
| HOST_DATA | 0 | qm->pdev->devcap | 0-u32max |
| HOST_DATA | 0 | qm->pdev->device | 0-u16max |
| HOST_DATA | 0 | qm->pdev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | qm->pdev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->irq | 0-255 |
| HOST_DATA | 0 | qm->pdev->is_cxl | 0-1 |
| HOST_DATA | 0 | qm->pdev->multifunction | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | qm->pdev->physfn->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | qm->pdev->physfn->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | qm->pdev->physfn->class | 0-16777215 |
| HOST_DATA | 0 | qm->pdev->physfn->current_state | 0-3[c] |
| HOST_DATA | 0 | qm->pdev->physfn->devcap | 0-u32max |
| HOST_DATA | 0 | qm->pdev->physfn->devfn | 1-503[c] |
| HOST_DATA | 0 | qm->pdev->physfn->device | 0-u16max |
| HOST_DATA | 0 | qm->pdev->physfn->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | qm->pdev->physfn->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->physfn->hdr_type | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->physfn->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->physfn->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->physfn->irq | 0-255 |
| HOST_DATA | 0 | qm->pdev->physfn->is_cxl | 0-1 |
| HOST_DATA | 0 | qm->pdev->physfn->multifunction | 0-1[c] |
| HOST_DATA | 0 | qm->pdev->physfn->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->physfn->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | qm->pdev->physfn->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | qm->pdev->physfn->pin | 0 |
| HOST_DATA | 0 | qm->pdev->physfn->pme_support | 0-31[c] |
| HOST_DATA | 0 | qm->pdev->physfn->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->physfn->revision | 0-255 |
| HOST_DATA | 0 | qm->pdev->physfn->sriov->class | 0-4294967295 |
| HOST_DATA | 0 | qm->pdev->physfn->sriov->hdr_type | 0-255 |
| HOST_DATA | 0 | qm->pdev->physfn->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->physfn->sriov->offset | 0-u16max |
| HOST_DATA | 0 | qm->pdev->physfn->sriov->stride | 0-u16max |
| HOST_DATA | 0 | qm->pdev->physfn->sriov->subsystem_device | 0-u16max |
| HOST_DATA | 0 | qm->pdev->physfn->sriov->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | qm->pdev->physfn->subsystem_device | 0-u16max |
| HOST_DATA | 0 | qm->pdev->physfn->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | qm->pdev->physfn->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | qm->pdev->physfn->transparent | 0[c] |
| HOST_DATA | 0 | qm->pdev->physfn->vendor | 0-u16max |
| HOST_DATA | 0 | qm->pdev->pin | 0 |
| HOST_DATA | 0 | qm->pdev->pme_support | 0-31[c] |
| HOST_DATA | 0 | qm->pdev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->revision | 0-255 |
| HOST_DATA | 0 | qm->pdev->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | qm->pdev->sriov->offset | 0-u16max |
| HOST_DATA | 0 | qm->pdev->sriov->stride | 0-u16max |
| HOST_DATA | 0 | qm->pdev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | qm->pdev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | qm->pdev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | qm->pdev->transparent | 0[c] |
| HOST_DATA | 0 | qm->pdev->vendor | 0-u16max |
| HOST_DATA | 0 | qm->qdma.size | 0,32-274878431104[c] |
| HOST_DATA | 0 | qm->qp_num | 0-s32max[c] |
| HOST_DATA | 0 | qm->sqc_dma | 0-u64max[c] |
| HOST_DATA | 0 | *qm->pdev->dev.driver_data | s64min-s64max |
| HOST_DATA | 0 | *qm->pdev->physfn->dev.driver_data | s64min-s64max |
| NO_OVERFLOW_SIMPLE | 0 | qm->cap_tables.qm_cap_size | |
| NO_OVERFLOW_SIMPLE | 0 | qm->qp_num | |
| HALF_LOCKED2 | &pdev->dev.mutex |