Defined in 2 files as a member:
- arch/powerpc/include/asm/xics.h, line 56 (as a member)
- drivers/gpu/drm/xe/xe_exec_queue_types.h, line 313 (as a member)
Defined in 10 files as a function:
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c, line 70 (as a function)
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c, line 70 (as a function)
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c, line 96 (as a function)
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c, line 77 (as a function)
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12_1.c, line 135 (as a function)
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c, line 114 (as a function)
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c, line 73 (as a function)
- drivers/gpu/drm/i915/gem/i915_gem_context.c, line 2077 (as a function)
- net/bridge/br_sysfs_br.c, line 208 (as a function)
- tools/tracing/latency/latency-collector.c, line 1031 (as a function)
Referenced in 18 files:
- arch/powerpc/sysdev/xics/icp-hv.c, line 156
- arch/powerpc/sysdev/xics/icp-native.c, line 293
- arch/powerpc/sysdev/xics/icp-opal.c, line 178
- arch/powerpc/sysdev/xics/xics-common.c
- drivers/dma/qcom/hidma_mgmt_sys.c
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c, line 236
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c, line 273
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c, line 242
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12_1.c, line 319
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c, line 332
- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c
- drivers/gpu/drm/i915/gem/i915_gem_context.c, line 2238
- drivers/gpu/drm/xe/xe_execlist.c, line 466
- drivers/gpu/drm/xe/xe_guc_submit.c, line 2593
- drivers/xen/events/events_base.c
- net/bridge/br_sysfs_br.c, line 218
- tools/tracing/latency/latency-collector.c, line 2103
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_vi.c __update_mqd() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| DATA_SOURCE | 0 | mdev | $1 |
| DATA_SOURCE | 1 | i | $2 |
| BIT_INFO | 0 | mdev->cp_hqd_eop_control | 0x18000,0x1800f |
| BIT_INFO | 0 | mdev->cp_hqd_pq_control | 0x18500,0xc01853f |
| BIT_INFO | 0 | mdev->cp_hqd_pq_doorbell_control | 0x0,0xfffffffc |
| NOSPEC | 1 | i->ctl_stack_size | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_lo | 0-u32max[c] |
| USER_DATA | 0 | mdev->cp_hqd_eop_control | 0,32768-u32max[c][u] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_lo | 0-u32max[c] |
| USER_DATA | 1 | i->ctl_stack_size | 0-u32max |
| USER_DATA | 1 | i->ctx_save_restore_area_address | 0-u64max |
| USER_DATA | 1 | i->ctx_save_restore_area_size | 0-u32max |
| USER_DATA | 1 | i->eop_ring_buffer_address | 0-u64max |
| USER_DATA | 1 | i->eop_ring_buffer_size | 0-u32max |
| USER_DATA | 1 | i->format | 0,2-u32max |
| USER_DATA | 1 | i->metadata_queue_size | 0-u32max[u] |
| USER_DATA | 1 | i->pm4_target_xcc | 0-255[c] |
| USER_DATA | 1 | i->priority | 0-u32max |
| USER_DATA | 1 | i->queue_address | 0-u64max |
| USER_DATA | 1 | i->queue_id | 0-1023 |
| USER_DATA | 1 | i->queue_percent | 0-u32max |
| USER_DATA | 1 | i->queue_size | 0-u64max |
| USER_DATA | 1 | i->sdma_engine_id | 0-u32max |
| USER_DATA | 1 | i->sdma_queue_id | 0-s32max[c] |
| USER_DATA | 1 | i->type | 0,2,4-u32max |
| HALF_LOCKED2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &p->mutex |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_vi.c init_mqd() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| DATA_SOURCE | 1 | i | $4 |
| NOSPEC | 1 | i->ctl_stack_size | |
| NOSPEC | 1 | i->queue_id | |
| MEM_ZERO | 0 | mdev | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| USER_DATA | 1 | i->ctl_stack_size | 0-u32max |
| USER_DATA | 1 | i->ctx_save_restore_area_address | 0-u64max |
| USER_DATA | 1 | i->ctx_save_restore_area_size | 0-u32max |
| USER_DATA | 1 | i->eop_ring_buffer_address | 0-u64max |
| USER_DATA | 1 | i->eop_ring_buffer_size | 0-u32max |
| USER_DATA | 1 | i->format | 0-u32max |
| USER_DATA | 1 | i->metadata_queue_size | 0-u32max[u] |
| USER_DATA | 1 | i->pm4_target_xcc | 0-255[c] |
| USER_DATA | 1 | i->priority | 0-u32max |
| USER_DATA | 1 | i->queue_address | 0-u64max |
| USER_DATA | 1 | i->queue_id | 0-1023 |
| USER_DATA | 1 | i->queue_percent | 0-u32max |
| USER_DATA | 1 | i->queue_size | 0-u64max |
| USER_DATA | 1 | i->sdma_engine_id | 0-u32max |
| USER_DATA | 1 | i->sdma_queue_id | 0-s32max[c] |
| USER_DATA | 1 | i->type | 0,2,4 |
| HALF_LOCKED2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &p->mutex |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_cik.c __update_mqd() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| DATA_SOURCE | 0 | mdev | $1 |
| DATA_SOURCE | 1 | i | $2 |
| BIT_INFO | 0 | mdev->cp_hqd_ib_control | 0x300000,0xb00000 |
| BIT_INFO | 0 | mdev->cp_hqd_pq_control | 0x300500,0x8b0053f |
| BIT_INFO | 0 | mdev->cp_hqd_pq_doorbell_control | 0x0,0xfffffffc |
| NOSPEC | 1 | i->ctl_stack_size | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| USER_DATA | 0 | mdev->cp_hqd_pq_base_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_lo | 0-u32max[c] |
| USER_DATA | 1 | i->ctl_stack_size | 0-u32max |
| USER_DATA | 1 | i->ctx_save_restore_area_address | 0-u64max |
| USER_DATA | 1 | i->ctx_save_restore_area_size | 0-u32max |
| USER_DATA | 1 | i->eop_ring_buffer_address | 0-u64max |
| USER_DATA | 1 | i->eop_ring_buffer_size | 0-u32max |
| USER_DATA | 1 | i->format | 0,2-u32max |
| USER_DATA | 1 | i->metadata_queue_size | 0-u32max[u] |
| USER_DATA | 1 | i->pm4_target_xcc | 0-255[c] |
| USER_DATA | 1 | i->priority | 0-u32max |
| USER_DATA | 1 | i->queue_address | 0-u64max |
| USER_DATA | 1 | i->queue_id | 0-1023 |
| USER_DATA | 1 | i->queue_percent | 0-u32max |
| USER_DATA | 1 | i->queue_size | 0-u64max |
| USER_DATA | 1 | i->sdma_engine_id | 0-u32max |
| USER_DATA | 1 | i->sdma_queue_id | 0-s32max[c] |
| USER_DATA | 1 | i->type | 0,2,4-u32max |
| HALF_LOCKED2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &p->mutex |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_cik.c init_mqd() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| DATA_SOURCE | 1 | i | $4 |
| NOSPEC | 1 | i->ctl_stack_size | |
| NOSPEC | 1 | i->queue_id | |
| MEM_ZERO | 0 | mdev | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| USER_DATA | 1 | i->ctl_stack_size | 0-u32max |
| USER_DATA | 1 | i->ctx_save_restore_area_address | 0-u64max |
| USER_DATA | 1 | i->ctx_save_restore_area_size | 0-u32max |
| USER_DATA | 1 | i->eop_ring_buffer_address | 0-u64max |
| USER_DATA | 1 | i->eop_ring_buffer_size | 0-u32max |
| USER_DATA | 1 | i->format | 0-u32max |
| USER_DATA | 1 | i->metadata_queue_size | 0-u32max[u] |
| USER_DATA | 1 | i->pm4_target_xcc | 0-255[c] |
| USER_DATA | 1 | i->priority | 0-u32max |
| USER_DATA | 1 | i->queue_address | 0-u64max |
| USER_DATA | 1 | i->queue_id | 0-1023 |
| USER_DATA | 1 | i->queue_percent | 0-u32max |
| USER_DATA | 1 | i->queue_size | 0-u64max |
| USER_DATA | 1 | i->sdma_engine_id | 0-u32max |
| USER_DATA | 1 | i->sdma_queue_id | 0-s32max[c] |
| USER_DATA | 1 | i->type | 0,2,4 |
| HALF_LOCKED2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &p->mutex |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_cik.c update_mqd_hiq() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| DATA_SOURCE | 0 | mdev | $1 |
| DATA_SOURCE | 1 | i | $2 |
| BIT_INFO | 0 | mdev->cp_hqd_pq_control | 0xc0300500,0xc030053f |
| BIT_INFO | 0 | mdev->cp_hqd_pq_doorbell_control | 0x0,0xfffffffc |
| NOSPEC | 1 | i->ctl_stack_size | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| USER_DATA | 0 | mdev->cp_hqd_pq_base_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_lo | 0-u32max[c] |
| USER_DATA | 1 | i->ctl_stack_size | 0-u32max |
| USER_DATA | 1 | i->ctx_save_restore_area_address | 0-u64max |
| USER_DATA | 1 | i->ctx_save_restore_area_size | 0-u32max |
| USER_DATA | 1 | i->eop_ring_buffer_address | 0-u64max |
| USER_DATA | 1 | i->eop_ring_buffer_size | 0-u32max |
| USER_DATA | 1 | i->format | 0-u32max |
| USER_DATA | 1 | i->metadata_queue_size | 0-u32max[u] |
| USER_DATA | 1 | i->pm4_target_xcc | 0-255[c] |
| USER_DATA | 1 | i->priority | 0-u32max |
| USER_DATA | 1 | i->queue_address | 0-u64max |
| USER_DATA | 1 | i->queue_id | 0-1023 |
| USER_DATA | 1 | i->queue_percent | 0-u32max |
| USER_DATA | 1 | i->queue_size | 0-u64max |
| USER_DATA | 1 | i->sdma_engine_id | 0-u32max |
| USER_DATA | 1 | i->sdma_queue_id | 0-s32max[c] |
| USER_DATA | 1 | i->type | 0,2,4-u32max |
| HALF_LOCKED2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &p->mutex |
drivers/gpu/drm/i915/gem/i915_gem_context.c ctx_setparam() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 0 | mdev->ref.refcount.refs.counter | (-1073741824),0-s32max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| PARAM_VALUE | 1 | i->param | 6 |
| BUF_SIZE | 1 | i | 128-16383 |
| BUF_SIZE | 1 | i | 128-16383 |
| DATA_SOURCE | 0 | mdev | $1 |
| DATA_SOURCE | 1 | i | $2 |
| USER_DATA | 1 | i->ctx_id | 0-u32max[u] |
| USER_DATA | 1 | i->param | 6[u] |
| USER_DATA | 1 | i->size | 0-u32max[u] |
| USER_DATA | 1 | i->value | 0-u64max[u] |
| USER_PTR | 1 | i |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v12.c update_mqd() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| CAPPED_DATA | 0 | mdev->cp_hqd_eop_control | 1 |
| DATA_SOURCE | 0 | mdev | $1 |
| DATA_SOURCE | 1 | i | $2 |
| BIT_INFO | 0 | mdev->cp_hqd_eop_control | 0x0,0xf |
| BIT_INFO | 0 | mdev->cp_hqd_pq_doorbell_control | 0x0,0xfffffffe |
| NOSPEC | 1 | i->ctl_stack_size | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_lo | 0-u32max[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_lo | 0-u32max[c] |
| USER_DATA | 1 | i->ctl_stack_size | 0-u32max |
| USER_DATA | 1 | i->ctx_save_restore_area_address | 0-u64max |
| USER_DATA | 1 | i->ctx_save_restore_area_size | 0-u32max |
| USER_DATA | 1 | i->eop_ring_buffer_address | 0-u64max |
| USER_DATA | 1 | i->eop_ring_buffer_size | 0-u32max |
| USER_DATA | 1 | i->format | 0,2-u32max |
| USER_DATA | 1 | i->metadata_queue_size | 0-u32max[u] |
| USER_DATA | 1 | i->pm4_target_xcc | 0-255[c] |
| USER_DATA | 1 | i->priority | 0-u32max |
| USER_DATA | 1 | i->queue_address | 0-u64max |
| USER_DATA | 1 | i->queue_id | 0-1023 |
| USER_DATA | 1 | i->queue_percent | 0-u32max |
| USER_DATA | 1 | i->queue_size | 0-u64max |
| USER_DATA | 1 | i->sdma_engine_id | 0-u32max |
| USER_DATA | 1 | i->sdma_queue_id | 0-s32max[c] |
| USER_DATA | 1 | i->type | 0,2,4-u32max |
| HALF_LOCKED2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &p->mutex |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v9.c update_mqd() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| CAPPED_DATA | 0 | mdev->cp_hqd_eop_control | 1 |
| DATA_SOURCE | 0 | mdev | $1 |
| DATA_SOURCE | 1 | i | $2 |
| BIT_INFO | 0 | mdev->cp_hqd_eop_control | 0x0,0xf |
| BIT_INFO | 0 | mdev->cp_hqd_pq_doorbell_control | 0x0,0xfffffffe |
| NOSPEC | 1 | i->ctl_stack_size | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_lo | 0-u32max[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_lo | 0-u32max[c] |
| USER_DATA | 1 | i->ctl_stack_size | 0-u32max |
| USER_DATA | 1 | i->ctx_save_restore_area_address | 0-u64max |
| USER_DATA | 1 | i->ctx_save_restore_area_size | 0-u32max |
| USER_DATA | 1 | i->eop_ring_buffer_address | 0-u64max |
| USER_DATA | 1 | i->eop_ring_buffer_size | 0-u32max |
| USER_DATA | 1 | i->format | 0,2-u32max |
| USER_DATA | 1 | i->metadata_queue_size | 0-u32max[u] |
| USER_DATA | 1 | i->pm4_target_xcc | 0-255[c] |
| USER_DATA | 1 | i->priority | 0-u32max |
| USER_DATA | 1 | i->queue_address | 0-u64max |
| USER_DATA | 1 | i->queue_id | 0-1023 |
| USER_DATA | 1 | i->queue_percent | 0-u32max |
| USER_DATA | 1 | i->queue_size | 0-u64max |
| USER_DATA | 1 | i->sdma_engine_id | 0-u32max |
| USER_DATA | 1 | i->sdma_queue_id | 0-s32max[c] |
| USER_DATA | 1 | i->type | 0,2,4-u32max |
| HALF_LOCKED2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &p->mutex |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v11.c update_mqd() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| CAPPED_DATA | 0 | mdev->cp_hqd_eop_control | 1 |
| DATA_SOURCE | 0 | mdev | $1 |
| DATA_SOURCE | 1 | i | $2 |
| BIT_INFO | 0 | mdev->cp_hqd_eop_control | 0x0,0xf |
| BIT_INFO | 0 | mdev->cp_hqd_pq_doorbell_control | 0x0,0xfffffffe |
| NOSPEC | 1 | i->ctl_stack_size | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_lo | 0-u32max[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_lo | 0-u32max[c] |
| USER_DATA | 1 | i->ctl_stack_size | 0-u32max |
| USER_DATA | 1 | i->ctx_save_restore_area_address | 0-u64max |
| USER_DATA | 1 | i->ctx_save_restore_area_size | 0-u32max |
| USER_DATA | 1 | i->eop_ring_buffer_address | 0-u64max |
| USER_DATA | 1 | i->eop_ring_buffer_size | 0-u32max |
| USER_DATA | 1 | i->format | 0,2-u32max |
| USER_DATA | 1 | i->metadata_queue_size | 0-u32max[u] |
| USER_DATA | 1 | i->pm4_target_xcc | 0-255[c] |
| USER_DATA | 1 | i->priority | 0-u32max |
| USER_DATA | 1 | i->queue_address | 0-u64max |
| USER_DATA | 1 | i->queue_id | 0-1023 |
| USER_DATA | 1 | i->queue_percent | 0-u32max |
| USER_DATA | 1 | i->queue_size | 0-u64max |
| USER_DATA | 1 | i->sdma_engine_id | 0-u32max |
| USER_DATA | 1 | i->sdma_queue_id | 0-s32max[c] |
| USER_DATA | 1 | i->type | 0,2,4-u32max |
| HALF_LOCKED2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &p->mutex |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v10.c update_mqd() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| CAPPED_DATA | 0 | mdev->cp_hqd_eop_control | 1 |
| DATA_SOURCE | 0 | mdev | $1 |
| DATA_SOURCE | 1 | i | $2 |
| BIT_INFO | 0 | mdev->cp_hqd_eop_control | 0x0,0xf |
| BIT_INFO | 0 | mdev->cp_hqd_pq_doorbell_control | 0x0,0xfffffffe |
| NOSPEC | 1 | i->ctl_stack_size | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_lo | 0-u32max[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_lo | 0-u32max[c] |
| USER_DATA | 1 | i->ctl_stack_size | 0-u32max |
| USER_DATA | 1 | i->ctx_save_restore_area_address | 0-u64max |
| USER_DATA | 1 | i->ctx_save_restore_area_size | 0-u32max |
| USER_DATA | 1 | i->eop_ring_buffer_address | 0-u64max |
| USER_DATA | 1 | i->eop_ring_buffer_size | 0-u32max |
| USER_DATA | 1 | i->format | 0,2-u32max |
| USER_DATA | 1 | i->metadata_queue_size | 0-u32max[u] |
| USER_DATA | 1 | i->pm4_target_xcc | 0-255[c] |
| USER_DATA | 1 | i->priority | 0-u32max |
| USER_DATA | 1 | i->queue_address | 0-u64max |
| USER_DATA | 1 | i->queue_id | 0-1023 |
| USER_DATA | 1 | i->queue_percent | 0-u32max |
| USER_DATA | 1 | i->queue_size | 0-u64max |
| USER_DATA | 1 | i->sdma_engine_id | 0-u32max |
| USER_DATA | 1 | i->sdma_queue_id | 0-s32max[c] |
| USER_DATA | 1 | i->type | 0,2,4-u32max |
| HALF_LOCKED2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &p->mutex |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v12_1.c update_mqd() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 1 | i | 4096-ptr_max |
| CAPPED_DATA | 0 | mdev->cp_hqd_eop_control | 1 |
| CAPPED_DATA | 1 | i->metadata_queue_size | 1 |
| DATA_SOURCE | 0 | mdev | $1 |
| DATA_SOURCE | 1 | i | $2 |
| BIT_INFO | 0 | mdev->cp_hqd_eop_control | 0x0,0xf |
| BIT_INFO | 0 | mdev->cp_hqd_pq_control | 0x10000500,0xffffffff |
| BIT_INFO | 0 | mdev->cp_hqd_pq_doorbell_control | 0x0,0xfffffffe |
| NOSPEC | 1 | i->ctl_stack_size | |
| NOSPEC | 1 | i->metadata_queue_size | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_eop_base_addr_lo | 0-u32max[c] |
| USER_DATA | 0 | mdev->cp_hqd_kd_base | 0-u32max[c] |
| USER_DATA | 0 | mdev->cp_hqd_kd_base_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_hi | 0-16777215[c] |
| USER_DATA | 0 | mdev->cp_hqd_pq_base_lo | 0-u32max[c] |
| USER_DATA | 1 | i->ctl_stack_size | 0-u32max |
| USER_DATA | 1 | i->ctx_save_restore_area_address | 0-u64max |
| USER_DATA | 1 | i->ctx_save_restore_area_size | 0-u32max |
| USER_DATA | 1 | i->eop_ring_buffer_address | 0-u64max |
| USER_DATA | 1 | i->eop_ring_buffer_size | 0-u32max |
| USER_DATA | 1 | i->format | 0,2-u32max |
| USER_DATA | 1 | i->metadata_queue_size | 0-u32max[c] |
| USER_DATA | 1 | i->pm4_target_xcc | 0-255[c] |
| USER_DATA | 1 | i->priority | 0-u32max |
| USER_DATA | 1 | i->queue_address | 0-u64max |
| USER_DATA | 1 | i->queue_id | 0-1023 |
| USER_DATA | 1 | i->queue_percent | 0-u32max |
| USER_DATA | 1 | i->queue_size | 0-u64max |
| USER_DATA | 1 | i->sdma_engine_id | 0-u32max |
| USER_DATA | 1 | i->sdma_queue_id | 0-s32max[c] |
| USER_DATA | 1 | i->type | 0,2,4-u32max |
| HALF_LOCKED2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &p->mutex |
drivers/dma/qcom/hidma_mgmt_sys.c set_values_channel() -> set_priority()
| Type | Parameter | Key | Value |
|---|---|---|---|
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| USER_DATA | 2 | val | 0-u64max |
| NO_OVERFLOW_SIMPLE | 2 | val | |
| UNITS | 1 | i | unit_array_size |
| LOCK2 | &of->mutex | ||
| HALF_LOCKED2 | &of->prealloc_mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct kernfs_open_file)->mutex |
net/bridge/br_sysfs_br.c store_bridge_parm() -> store_bridge_parm param 3()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | mdev | 4096-ptr_max |
| PARAM_VALUE | 0 | mdev->dev | 4096-ptr_max |
| PARAM_VALUE | 2 | val | 948854884830830592 |
| PARAM_VALUE | 2 | val->_msg | 0 |
| PARAM_VALUE | 2 | val->bad_attr | 0 |
| PARAM_VALUE | 2 | val->cookie_len | 0 |
| PARAM_VALUE | 2 | val->miss_nest | 0 |
| PARAM_VALUE | 2 | val->miss_type | 0 |
| PARAM_VALUE | 2 | val->policy | 0 |
| CAPPED_DATA | 0 | mdev->dev->nd_net.net | 1 |
| NS_CAPABLE | 0 | 12 | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| USER_DATA | 1 | i | 0-u64max |
| NO_OVERFLOW_SIMPLE | 1 | i | |
| LOCK2 | &of->mutex | ||
| LOCK2 | global &rtnl_mutex | ||
| HALF_LOCKED2 | &of->prealloc_mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct kernfs_open_file)->mutex |