| PARAM_VALUE |
0 |
rdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
rdev->mode_info.atom_context |
4096-ptr_max |
| PARAM_VALUE |
0 |
rdev->mode_info.atom_context->bios |
4096-ptr_max |
| PARAM_VALUE |
0 |
rdev->pm.dpm.priv |
4096-ptr_max |
| PARAM_VALUE |
1 |
rps |
4096-ptr_max |
| PARAM_VALUE |
1 |
rps->ps_priv |
4096-ptr_max |
| PARAM_VALUE |
2 |
index |
0-4 |
| BUF_SIZE |
0 |
rdev |
s32min-(-2),1-s32max |
| BUF_SIZE |
0 |
rdev |
s32min-(-2),1-s32max |
| BUF_SIZE |
0 |
rdev->agp |
(-1),144 |
| BUF_SIZE |
0 |
rdev->pm.dpm.priv |
19128 |
| BUF_SIZE |
0 |
rdev->pm.dpm.ps |
0-12240 |
| DATA_SOURCE |
0 |
rdev |
$0 |
| FUZZY_MAX |
2 |
index |
0 |
| BIT_INFO |
0 |
rdev->mc.mc_mask |
0xffffffff,0xffffffffffffffff |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
rdev->gart.num_cpu_pages |
0-524287[c] |
| HOST_DATA |
0 |
rdev->mc.aper_base |
0-1099511627775[c] |
| HOST_DATA |
0 |
rdev->mc.gtt_size |
0-s32max[c] |
| HOST_DATA |
0 |
rdev->mc.gtt_start |
0-u64max[c] |
| HOST_DATA |
0 |
rdev->mc.mc_vram_size |
0-4503599626321920 |
| HOST_DATA |
0 |
rdev->mc.real_vram_size |
0-4503599626321920 |
| HOST_DATA |
0 |
rdev->mc.vram_end |
0-4504699121172479,u64max[c] |
| HOST_DATA |
0 |
rdev->mc.vram_start |
0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.current_power_state_index |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.default_power_state_index |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.count |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->pm.num_power_states |
|
| NO_OVERFLOW_SIMPLE |
0 |
rdev->rmmio_size |
|
| LOCK2 |
|
&rdev->pm.mutex |
|
| TYPE_LOCK |
|
(struct radeon_pm)->mutex |
|
