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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/target/target_core_configfs.c target_dev_control_store() -> (struct target_backend_ops)->set_configfs_dev_params()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->transport 4096-ptr_max
PARAM_VALUE 1 page 1-u64max
PARAM_VALUE 1 *page 0
PARAM_VALUE 2 count 1-s32max
BUF_SIZE 1 page 4096
BUF_SIZE 1 page 4096
DATA_SOURCE 0 dev r to_device
DATA_SOURCE 1 page $1
DATA_SOURCE 2 count $2
CONTAINER 0 -136-4376+0 $(-1)
TERMINATED 1 page 1
RX_PATH
TASK_NOT_RUNNING
USER_DATA 2 count 1-s32max
LOCK2 &buffer->mutex
LOCK2 &frag->frag_sem
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct configfs_buffer)->mutex
TYPE_LOCK (struct configfs_fragment)->frag_sem

drivers/target/target_core_device.c core_dev_setup_virtual_lun0() -> (struct target_backend_ops)->set_configfs_dev_params()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->delayed_cmd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->delayed_cmd_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->delayed_cmd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->delayed_cmd_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->delayed_cmd_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.complete_type 0
PARAM_VALUE 0 dev->dev_attrib.da_dev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->delayed_cmd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->delayed_cmd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->dev_attrib.da_dev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->dev_sep_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->dev_sep_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->dev_tmr_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->dev_tmr_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->lun_reset_mutex.first_waiter 0
PARAM_VALUE 0 dev->dev_attrib.da_dev->lun_reset_mutex.magic 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->lun_reset_mutex.osq.tail.counter 0
PARAM_VALUE 0 dev->dev_attrib.da_dev->lun_reset_mutex.owner.counter 0
PARAM_VALUE 0 dev->dev_attrib.da_dev->non_ordered.data 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->non_ordered.percpu_count_ptr 4096-18446744073709547523
PARAM_VALUE 0 dev->dev_attrib.da_dev->prot_length 8
PARAM_VALUE 0 dev->dev_attrib.da_dev->qf_cmd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->qf_cmd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->queue_cnt 0-8193
PARAM_VALUE 0 dev->dev_attrib.da_dev->queues 16,4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->se_hba 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->stats 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_alua.lba_map_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_alua.lba_map_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_alua.t10_dev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_alua.tg_pt_gps_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_alua.tg_pt_gps_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_pr.aptpl_reg_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_pr.aptpl_reg_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_pr.registration_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_pr.registration_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_wwn.company_id 5125
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_wwn.t10_dev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_wwn.t10_vpd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->t10_wwn.t10_vpd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->transport 4096-ptr_max
PARAM_VALUE 0 dev->dev_attrib.da_dev->transport_flags 0-1,7
PARAM_VALUE 0 dev->dev_attrib.emulate_3pc 1
PARAM_VALUE 0 dev->dev_attrib.emulate_caw 1
PARAM_VALUE 0 dev->dev_attrib.emulate_dpo 1
PARAM_VALUE 0 dev->dev_attrib.emulate_fua_read 1
PARAM_VALUE 0 dev->dev_attrib.emulate_fua_write 1
PARAM_VALUE 0 dev->dev_attrib.emulate_model_alias 0
PARAM_VALUE 0 dev->dev_attrib.emulate_pr 1
PARAM_VALUE 0 dev->dev_attrib.emulate_rest_reord 0
PARAM_VALUE 0 dev->dev_attrib.emulate_rsoc 1
PARAM_VALUE 0 dev->dev_attrib.emulate_tas 1
PARAM_VALUE 0 dev->dev_attrib.emulate_tpu 0
PARAM_VALUE 0 dev->dev_attrib.emulate_tpws 0
PARAM_VALUE 0 dev->dev_attrib.emulate_ua_intlck_ctrl 0
PARAM_VALUE 0 dev->dev_attrib.emulate_write_cache 0
PARAM_VALUE 0 dev->dev_attrib.enforce_pr_isids 1
PARAM_VALUE 0 dev->dev_attrib.force_pr_aptpl 0
PARAM_VALUE 0 dev->dev_attrib.is_nonrot 0
PARAM_VALUE 0 dev->dev_attrib.max_unmap_block_desc_count 0
PARAM_VALUE 0 dev->dev_attrib.max_unmap_lba_count 0
PARAM_VALUE 0 dev->dev_attrib.max_write_same_len 0
PARAM_VALUE 0 dev->dev_attrib.pi_prot_type 0
PARAM_VALUE 0 dev->dev_attrib.submit_type 0
PARAM_VALUE 0 dev->dev_attrib.unmap_granularity 0
PARAM_VALUE 0 dev->dev_attrib.unmap_granularity_alignment 0
PARAM_VALUE 0 dev->dev_attrib.unmap_zeroes_data 0
PARAM_VALUE 0 dev->dev_sep_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_sep_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->dev_sep_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_sep_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->dev_sep_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_tmr_list.next 4096-ptr_max
PARAM_VALUE 0 dev->dev_tmr_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->dev_tmr_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->dev_tmr_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->dev_tmr_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->lun_reset_mutex.dep_map->name 0-255
PARAM_VALUE 0 dev->lun_reset_mutex.first_waiter 0
PARAM_VALUE 0 dev->lun_reset_mutex.magic 4096-ptr_max
PARAM_VALUE 0 dev->lun_reset_mutex.osq.tail.counter 0
PARAM_VALUE 0 dev->lun_reset_mutex.owner.counter 0
PARAM_VALUE 0 dev->non_ordered.data 4096-ptr_max
PARAM_VALUE 0 dev->non_ordered.data->confirm_switch 0
PARAM_VALUE 0 dev->non_ordered.data->count.counter s64min-(-9223372036854775807),0-s64max
PARAM_VALUE 0 dev->non_ordered.data->ref 4096-ptr_max
PARAM_VALUE 0 dev->non_ordered.percpu_count_ptr 4096-18446744073709547523
PARAM_VALUE 0 dev->prot_length 8
PARAM_VALUE 0 dev->qf_cmd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->qf_cmd_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->qf_cmd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->qf_cmd_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->qf_cmd_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->queue_cnt 0-8193
PARAM_VALUE 0 dev->queues 16,4096-ptr_max
PARAM_VALUE 0 dev->se_hba 4096-ptr_max
PARAM_VALUE 0 dev->se_hba->backend 4096-ptr_max
PARAM_VALUE 0 dev->se_hba->hba_access_mutex.first_waiter 0
PARAM_VALUE 0 dev->se_hba->hba_access_mutex.osq.tail.counter 0
PARAM_VALUE 0 dev->stats 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.lba_map_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.lba_map_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.lba_map_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.lba_map_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.lba_map_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->delayed_cmd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->delayed_cmd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->dev_sep_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->dev_sep_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->dev_tmr_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->dev_tmr_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->lun_reset_mutex.first_waiter 0
PARAM_VALUE 0 dev->t10_alua.t10_dev->lun_reset_mutex.magic 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->lun_reset_mutex.osq.tail.counter 0
PARAM_VALUE 0 dev->t10_alua.t10_dev->lun_reset_mutex.owner.counter 0
PARAM_VALUE 0 dev->t10_alua.t10_dev->non_ordered.data 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->non_ordered.percpu_count_ptr 4096-18446744073709547523
PARAM_VALUE 0 dev->t10_alua.t10_dev->prot_length 8
PARAM_VALUE 0 dev->t10_alua.t10_dev->qf_cmd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->qf_cmd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->queue_cnt 0-8193
PARAM_VALUE 0 dev->t10_alua.t10_dev->queues 16,4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->se_hba 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->stats 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_alua.lba_map_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_alua.lba_map_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_alua.t10_dev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_alua.tg_pt_gps_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_alua.tg_pt_gps_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_pr.aptpl_reg_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_pr.aptpl_reg_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_pr.registration_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_pr.registration_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_wwn.company_id 5125
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_wwn.t10_dev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_wwn.t10_vpd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->t10_wwn.t10_vpd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->transport 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.t10_dev->transport_flags 0-1,7
PARAM_VALUE 0 dev->t10_alua.tg_pt_gps_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.tg_pt_gps_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.tg_pt_gps_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.tg_pt_gps_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->t10_alua.tg_pt_gps_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_pr.aptpl_reg_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_pr.aptpl_reg_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->t10_pr.aptpl_reg_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_pr.aptpl_reg_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->t10_pr.aptpl_reg_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_pr.registration_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_pr.registration_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->t10_pr.registration_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_pr.registration_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->t10_pr.registration_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.company_id 5125
PARAM_VALUE 0 dev->t10_wwn.t10_dev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->delayed_cmd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->delayed_cmd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->dev_sep_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->dev_sep_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->dev_tmr_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->dev_tmr_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->lun_reset_mutex.first_waiter 0
PARAM_VALUE 0 dev->t10_wwn.t10_dev->lun_reset_mutex.magic 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->lun_reset_mutex.osq.tail.counter 0
PARAM_VALUE 0 dev->t10_wwn.t10_dev->lun_reset_mutex.owner.counter 0
PARAM_VALUE 0 dev->t10_wwn.t10_dev->non_ordered.data 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->non_ordered.percpu_count_ptr 4096-18446744073709547523
PARAM_VALUE 0 dev->t10_wwn.t10_dev->prot_length 8
PARAM_VALUE 0 dev->t10_wwn.t10_dev->qf_cmd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->qf_cmd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->queue_cnt 0-8193
PARAM_VALUE 0 dev->t10_wwn.t10_dev->queues 16,4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->se_hba 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->stats 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_alua.lba_map_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_alua.lba_map_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_alua.tg_pt_gps_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_alua.tg_pt_gps_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_pr.aptpl_reg_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_pr.aptpl_reg_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_pr.registration_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_pr.registration_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_wwn.t10_dev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_wwn.t10_vpd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->t10_wwn.t10_vpd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->transport 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_dev->transport_flags 0-1,7
PARAM_VALUE 0 dev->t10_wwn.t10_vpd_list.next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_vpd_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_vpd_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_vpd_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->t10_wwn.t10_vpd_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->transport 4096-ptr_max
PARAM_VALUE 0 dev->transport->transport_flags_default 0-1,7
PARAM_VALUE 0 dev->transport_flags 0-1,7
PARAM_VALUE 0 dev->xcopy_lun.lun_dev_link.next 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_dev_link.next->next 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_dev_link.prev 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_dev_link.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_dev_link.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_deve_list.next 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_deve_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_deve_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_deve_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_deve_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_se_dev 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_shutdown_comp.done 0
PARAM_VALUE 0 dev->xcopy_lun.lun_shutdown_comp.wait.lock.magic 3735899821
PARAM_VALUE 0 dev->xcopy_lun.lun_shutdown_comp.wait.lock.owner (-1)
PARAM_VALUE 0 dev->xcopy_lun.lun_shutdown_comp.wait.lock.owner_cpu u32max
PARAM_VALUE 0 dev->xcopy_lun.lun_shutdown_comp.wait.task_list.next 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_shutdown_comp.wait.task_list.next->next 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_shutdown_comp.wait.task_list.prev 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_shutdown_comp.wait.task_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_shutdown_comp.wait.task_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_tg_pt_md_mutex.dep_map->name 0-255
PARAM_VALUE 0 dev->xcopy_lun.lun_tg_pt_md_mutex.first_waiter 0
PARAM_VALUE 0 dev->xcopy_lun.lun_tg_pt_md_mutex.magic 4096-ptr_max
PARAM_VALUE 0 dev->xcopy_lun.lun_tg_pt_md_mutex.osq.tail.counter 0
PARAM_VALUE 0 dev->xcopy_lun.lun_tg_pt_md_mutex.owner.counter 0
PARAM_VALUE 0 dev->xcopy_lun.lun_tpg 4513125199013400576
PARAM_VALUE 1 page 9206202901133434880
PARAM_VALUE 2 count 34
BUF_SIZE 0 dev 5816
BUF_SIZE 0 dev->se_hba 416
BUF_SIZE 1 page 34
CAPPED_DATA 0 dev->dev_attrib.da_dev->queue_cnt 1
CAPPED_DATA 0 dev->queue_cnt 1
CAPPED_DATA 0 dev->t10_alua.t10_dev->queue_cnt 1
CAPPED_DATA 0 dev->t10_wwn.t10_dev->queue_cnt 1
DATA_SOURCE 0 dev r target_alloc_device
STR_LEN 0 dev 33
TERMINATED 1 page 1
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 dev->dev_attrib.da_dev->queue_cnt
NO_OVERFLOW_SIMPLE 0 dev->queue_cnt
NO_OVERFLOW_SIMPLE 0 dev->t10_alua.t10_dev->queue_cnt
NO_OVERFLOW_SIMPLE 0 dev->t10_wwn.t10_dev->queue_cnt