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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_display.c hsw_enabled_transcoders() -> transcoder_ddi_func_is_enabled()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
PARAM_VALUE 0 *display->power.chv_phy_assert 0-1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 display->dmc.dmc->dc6_allowed.dc5_start 0-4294967295
HOST_DATA 0 display->power.domains.dc_state 0-u32max

drivers/gpu/drm/i915/display/intel_display.c hsw_enabled_transcoders() -> transcoder_ddi_func_is_enabled()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->dkl.phy_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 display->dmc.dmc->dc6_allowed.count 0-4294967295
PARAM_VALUE 0 display->dmc.dmc->dc6_allowed.dc5_start 0-4294967295
PARAM_VALUE 0 display->hotplug.poll_enabled 1
PARAM_VALUE 0 display->hotplug.poll_init_work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->info.__device_info 4096-ptr_max
PARAM_VALUE 0 display->irq.vlv_display_irqs_enabled 0
PARAM_VALUE 0 display->irq.vlv_imr_mask u32max
PARAM_VALUE 0 display->params.enable_dmc_wl 0-1
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 0 display->power.domains.async_put_next_delay 0,100-s32max
PARAM_VALUE 0 display->power.domains.async_put_wakeref 0
PARAM_VALUE 0 display->power.domains.async_put_work->timer->entry.pprev 4096-ptr_max
PARAM_VALUE 0 display->power.domains.async_put_work.timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 display->power.domains.async_put_work.work.entry.next->next 1-u64max
PARAM_VALUE 0 display->power.domains.async_put_work.work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->power.domains.async_put_work.work.entry.prev->next 1-u64max
PARAM_VALUE 0 display->power.domains.async_put_work.work.entry.prev->prev 1-u64max
PARAM_VALUE 0 display->power.domains.lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 display->power.domains.power_wells->count s32min-s32max
PARAM_VALUE 0 display->power.domains.power_wells->hw_enabled 1
PARAM_VALUE 0 display->psr_dc5_dc6_wa_work.entry.next 4096-ptr_max
PARAM_VALUE 0 display->psr_dc5_dc6_wa_work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->wl.dc_state 0-3
PARAM_VALUE 0 display->wl.enabled 1
PARAM_VALUE 0 display->wl.work->timer->entry.pprev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.next->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.prev->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->prev 1-u64max
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
PARAM_VALUE 0 *display->power.chv_phy_assert 0-1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 display->dmc.dmc->dc6_allowed.dc5_start 0-4294967295
HOST_DATA 0 display->power.domains.dc_state 0-u32max
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max