| PARAM_VALUE |
0 |
dev_priv |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->binding_mutex.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
dev_priv->binding_mutex.first_waiter |
0 |
| PARAM_VALUE |
0 |
dev_priv->binding_mutex.magic |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->binding_mutex.owner.counter |
0 |
| PARAM_VALUE |
0 |
dev_priv->capabilities |
32768-2147483646,2147483648-u32max |
| PARAM_VALUE |
0 |
dev_priv->cmdbuf_mutex.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
dev_priv->cmdbuf_mutex.first_waiter |
0 |
| PARAM_VALUE |
0 |
dev_priv->cmdbuf_mutex.magic |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->cmdbuf_mutex.osq.tail.counter |
0 |
| PARAM_VALUE |
0 |
dev_priv->cmdbuf_mutex.owner.counter |
0 |
| PARAM_VALUE |
0 |
dev_priv->crc_workq |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->ctx.res_ht |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm.dev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm.dev->devres_head.prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm.dev->devres_head.prev->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm.dev->devres_head.prev->next->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm.dev->dma_parms |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm.dev->dma_parms->max_segment_size |
u32max |
| PARAM_VALUE |
0 |
dev_priv->drm.managed.resources.next->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm.managed.resources.next->prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->drm.num_crtcs |
8 |
| PARAM_VALUE |
0 |
dev_priv->fence_queue.head.next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fence_queue.head.next->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fence_queue.head.prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fence_queue.head.prev->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fence_queue.head.prev->prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fence_queue_waiters |
0 |
| PARAM_VALUE |
0 |
dev_priv->fifo_mem |
1-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fifo_mem_size |
0-u32max |
| PARAM_VALUE |
0 |
dev_priv->fifo_queue.head.next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fifo_queue.head.next->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fifo_queue.head.prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fifo_queue.head.prev->next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fifo_queue.head.prev->prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->fifo_queue_waiters |
0 |
| PARAM_VALUE |
0 |
dev_priv->hw_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
dev_priv->initial_height |
800-u32max |
| PARAM_VALUE |
0 |
dev_priv->initial_width |
1280-u32max |
| PARAM_VALUE |
0 |
dev_priv->map_mode |
0-2 |
| PARAM_VALUE |
0 |
dev_priv->max_mob_pages |
0-1073741823 |
| PARAM_VALUE |
0 |
dev_priv->max_primary_mem |
0-u32max |
| PARAM_VALUE |
0 |
dev_priv->pci_id |
1029-1030 |
| PARAM_VALUE |
0 |
dev_priv->res_idr |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->res_lru |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->rmmio |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->tdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev_priv->tdev->idr.idr_base |
53033 |
| PARAM_VALUE |
0 |
dev_priv->tdev->idr.idr_next |
0 |
| PARAM_VALUE |
0 |
dev_priv->tdev->idr.idr_rt.xa_flags |
33554436 |
| PARAM_VALUE |
0 |
dev_priv->tdev->idr.idr_rt.xa_head |
0 |
| PARAM_VALUE |
0 |
dev_priv->tdev->ops.release |
1549958572084727808 |
| PARAM_VALUE |
0 |
dev_priv->used_memory_size |
0 |
| PARAM_VALUE |
0 |
dev_priv->vram_size |
0-u32max |
| PARAM_VALUE |
0 |
*dev_priv->irqs |
0-4294967295 |
| BUF_SIZE |
0 |
dev_priv->tdev |
272 |
| CAPPED_DATA |
0 |
dev_priv->fb_max_width |
1 |
| DATA_SOURCE |
0 |
dev_priv |
$0 |
| FUZZY_MAX |
0 |
dev_priv->max_mob_pages |
0 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| HOST_DATA |
0 |
dev_priv->capabilities |
32768-2147483646,2147483648-u32max |
| HOST_DATA |
0 |
dev_priv->capabilities2 |
0-u32max |
| HOST_DATA |
0 |
dev_priv->fb_max_height |
0-u32max |
| HOST_DATA |
0 |
dev_priv->fb_max_width |
0-u32max[c] |
| HOST_DATA |
0 |
dev_priv->fifo_mem_size |
0-u32max |
| HOST_DATA |
0 |
dev_priv->initial_height |
801-u32max[c] |
| HOST_DATA |
0 |
dev_priv->initial_width |
1281-u32max[c] |
| HOST_DATA |
0 |
dev_priv->max_gmr_ids |
0-u32max |
| HOST_DATA |
0 |
dev_priv->max_gmr_pages |
0-u32max |
| HOST_DATA |
0 |
dev_priv->max_mob_pages |
0-1073741823[c] |
| HOST_DATA |
0 |
dev_priv->max_mob_size |
0-u32max |
| HOST_DATA |
0 |
dev_priv->max_primary_mem |
0-u32max |
| HOST_DATA |
0 |
dev_priv->memory_size |
0-u32max |
| HOST_DATA |
0 |
dev_priv->stdu_max_height |
0-u32max |
| HOST_DATA |
0 |
dev_priv->stdu_max_width |
0-u32max |
| HOST_DATA |
0 |
dev_priv->texture_max_height |
0-u32max |
| HOST_DATA |
0 |
dev_priv->texture_max_width |
0-u32max |
| HOST_DATA |
0 |
dev_priv->vram_size |
0-u32max |
| NO_OVERFLOW_SIMPLE |
0 |
dev_priv->drm.num_crtcs |
|