| PARAM_VALUE |
0 |
display |
4096-ptr_max |
| PARAM_VALUE |
0 |
display->cdclk.funcs |
4096-ptr_max |
| PARAM_VALUE |
0 |
display->cdclk.funcs->set_cdclk |
0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232 |
| PARAM_VALUE |
0 |
display->cdclk.hw.cdclk |
0-4294967294 |
| PARAM_VALUE |
0 |
display->cdclk.table->waveform |
0,34952,37448,42148,42314,43604,43690,44378,46774,56246,61166,63454,65278,65534-u16max |
| PARAM_VALUE |
0 |
display->drm |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
display->drm->huge_mnt->mnt_sb->s_cop->inode_info_offs |
1632,1720,2632,2648 |
| PARAM_VALUE |
0 |
display->info.__device_info |
4096-ptr_max |
| PARAM_VALUE |
0 |
display->params.enable_dmc_wl |
0-1 |
| PARAM_VALUE |
0 |
display->parent |
4096-ptr_max |
| PARAM_VALUE |
0 |
display->parent->pcode |
4096-ptr_max |
| PARAM_VALUE |
0 |
display->parent->pcode->write |
4096-ptr_max |
| PARAM_VALUE |
0 |
display->parent->vlv_iosf |
0,197119610173992960 |
| PARAM_VALUE |
0 |
display->wl.work.timer.entry->pprev |
4096-ptr_max |
| PARAM_VALUE |
0 |
display->wl.work.work.entry.next->next |
1-u64max |
| PARAM_VALUE |
0 |
display->wl.work.work.entry.prev->next |
1-u64max |
| PARAM_VALUE |
0 |
display->wl.work.work.entry.prev->prev |
1-u64max |
| PARAM_VALUE |
0 |
*display->irq.pipestat_irq_mask |
0-4294967295 |
| PARAM_VALUE |
1 |
cdclk_config |
4096-ptr_max |
| PARAM_VALUE |
1 |
cdclk_config->cdclk |
1-u32max |
| BUF_SIZE |
0 |
display |
(-1),8128 |
| BUF_SIZE |
0 |
display |
(-1),8128 |
| CAPPED_DATA |
0 |
display->cdclk.hw.cdclk |
1 |
| DATA_SOURCE |
0 |
display |
$0 |
| DATA_SOURCE |
1 |
cdclk_config |
$1 |
| STR_LEN |
0 |
display |
(-1),21-22 |
| STR_LEN |
0 |
display |
(-1),21-22 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
display->cdclk.hw.joined_mbus |
0-1 |
| HOST_DATA |
0 |
display->drm->mode_config.object_idr.idr_rt.xa_flags |
0-u32max |
| HOST_DATA |
0 |
display->power.chv_phy_control |
0-u32max[c] |
| HOST_DATA |
0 |
display->power.domains.dc_state |
0-u32max |
| HOST_DATA |
0 |
display->state.bxt_phy_grc |
0-u32max |
| HOST_DATA |
1 |
cdclk_config->joined_mbus |
0-1 |
| NO_OVERFLOW_SIMPLE |
0 |
display->drm->num_crtcs |
|
| HALF_LOCKED2 |
0 |
&display->gmbus.mutex |
|