Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 3 files:
- drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c, line 160
- drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c, line 149
- drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_init.c, line 161
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_root_clock_control() -> (struct hwseq_private_funcs)->dpp_root_clock_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | hws | 4096-ptr_max |
| PARAM_VALUE | 0 | hws->funcs.dpp_root_clock_control | 1-u64max |
| PARAM_VALUE | 2 | clock_on | 1 |
| CAPPED_DATA | 1 | dpp_inst | 1 |
| DATA_SOURCE | 2 | clock_on | $2 |
| CONTAINER | 0 | *(-216-56+0) | $(-1) |
| RX_PATH | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_root_clock_control() -> (struct hwseq_private_funcs)->dpp_root_clock_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | hws | 4096-ptr_max |
| PARAM_VALUE | 0 | hws->funcs.dpp_root_clock_control | 1-u64max |
| PARAM_VALUE | 2 | clock_on | 0 |
| CAPPED_DATA | 1 | dpp_inst | 1 |
| DATA_SOURCE | 2 | clock_on | $2 |
| CONTAINER | 0 | *(-216-56+0) | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn42/dcn42_hwseq.c dcn42_root_clock_control() -> (struct hwseq_private_funcs)->dpp_root_clock_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | hws | 4096-ptr_max |
| PARAM_VALUE | 0 | hws->funcs.dpp_root_clock_control | 1-u64max |
| PARAM_VALUE | 2 | clock_on | 1 |
| CAPPED_DATA | 1 | dpp_inst | 1 |
| DATA_SOURCE | 2 | clock_on | $2 |
| CONTAINER | 0 | *(-216-56+0) | $(-1) |
| RX_PATH | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn42/dcn42_hwseq.c dcn42_root_clock_control() -> (struct hwseq_private_funcs)->dpp_root_clock_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | hws | 4096-ptr_max |
| PARAM_VALUE | 0 | hws->funcs.dpp_root_clock_control | 1-u64max |
| PARAM_VALUE | 2 | clock_on | 0 |
| CAPPED_DATA | 1 | dpp_inst | 1 |
| DATA_SOURCE | 2 | clock_on | $2 |
| CONTAINER | 0 | *(-216-56+0) | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_plane_atomic_power_down() -> (struct hwseq_private_funcs)->dpp_root_clock_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | hws | 4096-ptr_max |
| PARAM_VALUE | 0 | hws->funcs.dpp_root_clock_control | 1-u64max |
| PARAM_VALUE | 0 | hws->regs | 4096-ptr_max |
| PARAM_VALUE | 2 | clock_on | 0 |
| CONTAINER | 0 | -216-56+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c power_on_plane_resources() -> (struct hwseq_private_funcs)->dpp_root_clock_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | hws | 4096-ptr_max |
| PARAM_VALUE | 0 | hws->funcs.dpp_root_clock_control | 1-u64max |
| PARAM_VALUE | 2 | clock_on | 1 |
| DATA_SOURCE | 0 | hws | $0 |
| DATA_SOURCE | 1 | dpp_inst | $1 |
| CONTAINER | 0 | -216-56+0 | $(-1) |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_power_on_plane_resources() -> (struct hwseq_private_funcs)->dpp_root_clock_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | hws | 4096-ptr_max |
| PARAM_VALUE | 0 | hws->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | hws->funcs.dpp_root_clock_control | 1-u64max |
| PARAM_VALUE | 0 | hws->funcs.enable_plane | 0 |
| PARAM_VALUE | 2 | clock_on | 1 |
| DATA_SOURCE | 0 | hws | $0 |
| CONTAINER | 0 | -216-56+0 | $(-1) |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_plane_atomic_power_down() -> (struct hwseq_private_funcs)->dpp_root_clock_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | hws | 4096-ptr_max |
| PARAM_VALUE | 0 | hws->funcs.dpp_root_clock_control | 1-u64max |
| PARAM_VALUE | 2 | clock_on | 0 |
| CONTAINER | 0 | -216-56+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_hw_sequencer.c hwss_dpp_root_clock_control() -> (struct hwseq_private_funcs)->dpp_root_clock_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | hws | 4096-ptr_max |
| PARAM_VALUE | 0 | hws->funcs.dpp_root_clock_control | 1-u64max |
| CONTAINER | 0 | -216-56+0 | $(-1) |
| NOCHECK_CALL |