Defined in 1 files as a prototype:
Defined in 1 files as a member:
Defined in 1 files as a function:
Referenced in 21 files:
- drivers/gpu/drm/amd/display/dc/core/dc.c, line 4435
- drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
- drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
- drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c, line 549
- drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c, line 384
- drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c, line 346
- drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c, line 364
- drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c, line 375
- drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
- drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c, line 3110
- drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c, line 530
- drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c, line 1442
- drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c, line 1832
- drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
- drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
- drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c, line 139
- drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c
- drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c
- drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c, line 170
- drivers/gpu/drm/amd/display/dc/link/link_dpms.c, line 2573
- drivers/gpu/drm/amd/display/dc/link/link_factory.c
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c link_set_dpms_on_pre_enable_link() -> dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->link_state_valid | 1 |
| PARAM_VALUE | 1 | dp_test_mode | 3 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_disable_link_output() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->dccg->funcs->enable_hdmicharclk | 0,4,4096-ptr_max |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | dp_test_mode | 12 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio.c disable_dio_audio_packet() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | dp_test_mode | 11 |
| CONTAINER | 0 | *(-928-1872-0-25808+8) | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL | 0-u32max |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio.c disable_dio_link_output() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | dp_test_mode | 12 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL | 0-u32max |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio.c enable_dio_audio_packet() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | dp_test_mode | 7 |
| CONTAINER | 0 | *(-928-1872-0-25808+8) | $(-1) |
| NOCHECK_CALL | |||
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL | 0-u32max |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio.c enable_dio_dp_link_output() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->clk_mgr->funcs->notify_link_rate_change | 0,879894308257263616,2937398182047252480,7502416791745617920 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc_bios->funcs->external_encoder_control | 0,4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->current_state | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 5 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio.c reset_dio_stream_encoder() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->panel_cntl->ctx->dmub_srv->dm | 0-s64max |
| PARAM_VALUE | 1 | dp_test_mode | 13 |
| CONTAINER | 0 | *(-928-1872-0-25808+8) | $(-1) |
| NOCHECK_CALL | |||
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL | 0-u32max |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio.c set_dio_dp_link_test_pattern() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLKDeepSleep | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithoutRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FractionOfUrgentBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBW | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterBurstTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.output_bpp | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->res_cap->num_dig_link_enc | 0,3,5 |
| PARAM_VALUE | 0 | link->ctx->dc_bios->funcs->get_embedded_panel_info | 1-u64max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->link_enc->funcs->is_in_alt_mode | 0,1151869135948771328,5834955858206629888,7400184177439789056,7861121898187128832 |
| PARAM_VALUE | 0 | link->panel_cntl->funcs | 0,4096-ptr_max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | dp_test_mode | 6 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | link->ctx->dc->res_pool->pipe_count |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio.c setup_dio_stream_attribute() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 2 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio.c setup_dio_stream_encoder() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 4 |
| CONTAINER | 0 | *(-928-1872-0-25808+8) | $(-1) |
| RX_PATH | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL | 0-u32max |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_hpo_dp.c set_hpo_dp_link_test_pattern() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLKDeepSleep | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithoutRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FractionOfUrgentBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBW | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterBurstTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.output_bpp | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->res_cap->num_dig_link_enc | 0,3,5 |
| PARAM_VALUE | 0 | link->ctx->dc_bios->funcs->get_embedded_panel_info | 1-u64max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->link_enc->funcs->is_in_alt_mode | 0,1151869135948771328,5834955858206629888,7400184177439789056,7861121898187128832 |
| PARAM_VALUE | 0 | link->panel_cntl->funcs | 0,4096-ptr_max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | dp_test_mode | 6 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | link->ctx->dc->res_pool->pipe_count |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_hpo_dp.c setup_hpo_dp_stream_attribute() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 2 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c set_dio_fixed_vs_pe_retimer_dp_link_test_pattern() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLKDeepSleep | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithoutRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FractionOfUrgentBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBW | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterBurstTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.output_bpp | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->res_cap->num_dig_link_enc | 0,3,5 |
| PARAM_VALUE | 0 | link->ctx->dc_bios->funcs->get_embedded_panel_info | 1-u64max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->link_enc->funcs->is_in_alt_mode | 0,1151869135948771328,5834955858206629888,7400184177439789056,7861121898187128832 |
| PARAM_VALUE | 0 | link->panel_cntl->funcs | 0,4096-ptr_max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | 0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->opened | 0-1 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->opened | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | dp_test_mode | 6 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | link->ctx->dc->res_pool->pipe_count |
drivers/gpu/drm/amd/amdgpu/../display/dc/dio/dcn401/dcn401_dio_stream_encoder.c enc401_stream_encoder_dp_unblank() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 8 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn60/dcn60_hwseq.c dcn60_apply_single_controller_ctx_to_hw() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | dp_test_mode | 1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c dce110_apply_single_controller_ctx_to_hw() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c dce110_disable_link_output() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->dccg->funcs->enable_hdmicharclk | 0,4,4096-ptr_max |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 0 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | dp_test_mode | 12 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c dce110_enable_dp_link_output() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->clk_mgr->funcs->notify_link_rate_change | 0,879894308257263616,2937398182047252480,7502416791745617920 |
| PARAM_VALUE | 0 | link->ctx->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc_bios->funcs->external_encoder_control | 0,4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->current_state | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | dp_test_mode | 5 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dio/dcn10/dcn10_stream_encoder.c enc1_stream_encoder_dp_blank() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->link_enc->funcs->get_dig_frontend | 0,35576471446519808,300337660971397120 |
| PARAM_VALUE | 1 | dp_test_mode | 9 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dio/dcn10/dcn10_stream_encoder.c enc1_stream_encoder_dp_blank() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->link_enc->funcs->get_dig_frontend | 0,35576471446519808,300337660971397120 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | dp_test_mode | 10 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dio/dcn10/dcn10_stream_encoder.c enc1_stream_encoder_dp_unblank() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 8 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dpia.c disable_dpia_link_output() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | dp_test_mode | 12 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL | 0-u32max |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dpia.c enable_dpia_link_output() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->clk_mgr->funcs->notify_link_rate_change | 0,879894308257263616,2937398182047252480,7502416791745617920 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc_bios->funcs->external_encoder_control | 0,4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->current_state | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 5 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dpia.c set_dio_dpia_link_test_pattern() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLKDeepSleep | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithoutRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FractionOfUrgentBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBW | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterBurstTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.output_bpp | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->res_cap->num_dig_link_enc | 0,3,5 |
| PARAM_VALUE | 0 | link->ctx->dc_bios->funcs->get_embedded_panel_info | 2309307009891786752,3662906960133668864,4347781244361871360 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->link_enc->funcs->is_in_alt_mode | 0,1151869135948771328,5834955858206629888,7400184177439789056,7861121898187128832 |
| PARAM_VALUE | 0 | link->panel_cntl->funcs | 1629897440322760704,2032623094161895424,7501325087325945856 |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | dp_test_mode | 6 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | link->ctx->dc->res_pool->pipe_count |
drivers/gpu/drm/amd/amdgpu/../display/dc/dio/dcn32/dcn32_dio_stream_encoder.c enc32_stream_encoder_dp_unblank() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 8 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dio/dcn20/dcn20_stream_encoder.c enc2_stream_encoder_dp_unblank() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 8 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_disable_link_output() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->dccg->funcs->enable_hdmicharclk | 0,4,4096-ptr_max |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | dp_test_mode | 12 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_enable_stream() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 3 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn314/dcn314_hwseq.c dcn314_disable_link_output() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->dccg->funcs->enable_hdmicharclk | 0,4,4096-ptr_max |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 0 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | dp_test_mode | 12 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_hw_sequencer.c hwss_dp_trace_source_sequence() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv->dp_trace_source_sequence | 1-u64max |
| PARAM_VALUE | 1 | dp_test_mode | 0,3 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLKDeepSleep | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithoutRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FractionOfUrgentBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBW | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterBurstTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.output_bpp | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->res_cap->num_dig_link_enc | 0,3,5 |
| PARAM_VALUE | 0 | link->ctx->dc_bios->funcs->get_embedded_panel_info | 1-u64max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->link_enc->funcs->is_in_alt_mode | 0,1151869135948771328,5834955858206629888,7400184177439789056,7861121898187128832 |
| PARAM_VALUE | 0 | link->panel_cntl->funcs | 0,4096-ptr_max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | 0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->opened | 0-1 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->opened | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | dp_test_mode | 6 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | link->ctx->dc->res_pool->pipe_count |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn32/dcn32_hwseq.c dcn32_disable_link_output() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->dccg->funcs->enable_hdmicharclk | 0,4,4096-ptr_max |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 0 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | dp_test_mode | 12 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dio/dcn35/dcn35_dio_stream_encoder.c enc35_stream_encoder_dp_unblank() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 8 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dio/dcn314/dcn314_dio_stream_encoder.c enc314_stream_encoder_dp_unblank() -> (struct link_service)->dp_trace_source_sequence()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 1 | dp_test_mode | 8 |
| DATA_SOURCE | 0 | link | $0 |
| CONTAINER | 0 | -928-1872-488+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |