Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 4 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_cts.c dp_retrain_link_dp_test() -> link_set_dpms_off()

Type Parameter Key Value
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &adev->dm.dc_lock

drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_irq_handler.c dp_handle_link_loss() -> link_set_dpms_off()

Type Parameter Key Value
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &aconnector->hpd_lock
HALF_LOCKED2 &adev->dm.dc_lock

drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c disable_vbios_mode_if_required() -> (struct link_service)->set_dpms_off()

Type Parameter Key Value
PARAM_VALUE 0 pipe_ctx 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->prev_odm_pipe 0
PARAM_VALUE 0 pipe_ctx->stream 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->apply_seamless_boot_optimization 0
PARAM_VALUE 0 pipe_ctx->stream->link 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->link->local_sink 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->link->local_sink->sink_signal 128
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn21/dcn21_hwseq.c dcn21_PLAT_58856_wa() -> (struct link_service)->set_dpms_off()

Type Parameter Key Value
PARAM_VALUE 0 pipe_ctx 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->clock_source 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->clock_source->funcs 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->apply_seamless_boot_optimization 0
PARAM_VALUE 0 pipe_ctx->stream->ctx 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->ctx->dc 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->ctx->dc->link_srv 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->dpms_off 0
PARAM_VALUE 0 pipe_ctx->stream->link 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream_res.audio->funcs 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream_res.audio->funcs->az_disable_hbr_audio 5077894766283632640
PARAM_VALUE 0 pipe_ctx->stream_res.opp->funcs 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream_res.tg 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream_res.tg->funcs 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream_res.tg->funcs->set_static_screen_control 0,5071642371786563584,5913575906034724864,8835630547784204288
DATA_SOURCE 0 pipe_ctx $1
CONTAINER 0 -200-1872-0-25808-8+0 $(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_reset_back_end_for_pipe() -> (struct link_service)->set_dpms_off()

Type Parameter Key Value
PARAM_VALUE 0 pipe_ctx 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream_res.stream_enc 1-u64max
PARAM_VALUE 0 pipe_ctx->top_pipe 0
CAPPED_DATA 0 pipe_ctx->stream 1
DATA_SOURCE 0 pipe_ctx $1
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_reset_back_end_for_pipe() -> (struct link_service)->set_dpms_off()

Type Parameter Key Value
PARAM_VALUE 0 pipe_ctx 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->prev_odm_pipe 0
PARAM_VALUE 0 pipe_ctx->stream 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->ctx->dc->res_pool->funcs->link_encs_assign 0,5262900683136417792
PARAM_VALUE 0 pipe_ctx->stream_res.stream_enc 1-u64max
PARAM_VALUE 0 pipe_ctx->top_pipe 0
CAPPED_DATA 0 pipe_ctx->stream 1
DATA_SOURCE 0 pipe_ctx $1
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c dce110_reset_hw_ctx_wrap() -> (struct link_service)->set_dpms_off()

Type Parameter Key Value
PARAM_VALUE 0 pipe_ctx 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream 1-u64max
PARAM_VALUE 0 pipe_ctx->top_pipe 0
CAPPED_DATA 0 pipe_ctx->stream 1
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn31/dcn31_hwseq.c dcn31_reset_back_end_for_pipe() -> (struct link_service)->set_dpms_off()

Type Parameter Key Value
PARAM_VALUE 0 pipe_ctx 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->prev_odm_pipe 0
PARAM_VALUE 0 pipe_ctx->stream 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->adjust.timing_adjust_pending 0
PARAM_VALUE 0 pipe_ctx->stream->link 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->link->ctx->dc->res_pool->dccg->funcs->enable_hdmicharclk 0,4,4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream_res.stream_enc 1-u64max
PARAM_VALUE 0 pipe_ctx->stream_res.tg 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream_res.tg->funcs 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream_res.tg->funcs->set_odm_bypass 0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE 0 pipe_ctx->top_pipe 0
CAPPED_DATA 0 pipe_ctx->stream 1
DATA_SOURCE 0 pipe_ctx $1
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_reset_back_end_for_pipe() -> (struct link_service)->set_dpms_off()

Type Parameter Key Value
PARAM_VALUE 0 pipe_ctx 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->prev_odm_pipe 0
PARAM_VALUE 0 pipe_ctx->stream 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->ctx->dc->res_pool->funcs->link_encs_assign 0,5262900683136417792
PARAM_VALUE 0 pipe_ctx->stream->link 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream_res.stream_enc 1-u64max
PARAM_VALUE 0 pipe_ctx->top_pipe 0
CAPPED_DATA 0 pipe_ctx->stream 1
DATA_SOURCE 0 pipe_ctx $1
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_hw_sequencer.c hwss_link_set_dpms_off() -> (struct link_service)->set_dpms_off()

Type Parameter Key Value
PARAM_VALUE 0 pipe_ctx 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->link 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->link->dc 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->link->dc->link_srv 4096-ptr_max
PARAM_VALUE 0 pipe_ctx->stream->link->dc->link_srv->set_dpms_off 1-u64max
CONTAINER 0 -200-1872-488-8-8+0 $(-1)
NOCHECK_CALL